XRK4991A Datasheet, PDF (11/13 Pages) Exar Corporation – 3.3V HIGH-SPEED (85 MHZ) PROGRAMMABLE SKEW CLOCK BUFFER

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REV. P1.0.2
PRELIMINARY
XRK4991A
3.3V HIGH-SPEED (85 MHZ) PROGRAMMABLE SKEW CLOCK BUFFER
FIGURE 5. AC TIMING DIAGRAM
CLKIN
FB_IN
t_REF
t_RPWH
t_PD
t_RPWL
t_ODCV
t_ODCV
Any Q
OTHER Q
t_SKEWPR,
t_{SKEW0, 1}
INVERTED Q
CLKIN DIVIDED BY 2
CLKIN DIVIDED BY 4
t_{SKEW3, 4}
t_{SKEW1, 3, 4}
t_SKEWPR,
t_{SKEW0, 1}
t_SKEW2
t_{SKEW3, 4}
t_JR
t_SKEW2
t_{SKEW3, 4}
t_{SKEW2, 4}
NOTES:
1. PE: The AC Timing Diagram applies to PE=V_CC. For PE=GND, the negative edge of FB_IN aligns with the
negative edge of CLKIN, divided outputs change on the negative edge of CLKIN, and the positive edges of the
divide-by-2 and the divide-by-4 signals align.
2. Skew: The time between the earliest and the latest output transition among all outputs for which the same t_U delay
has been selected when all are loaded with 20pF and terminated with 75Ω to V_CC/2.
3. t_SKEWPR: The skew between a pair of outputs (Qx[1:0]) when all eight outputs are selected for 0t_U.
4. t_SKEW0: The skew between outputs when they are selected for 0t_U.
5. t_DEV: The output-to-output skew between any two devices operating under the same conditions (VCC, ambient
temperature, air flow, etc.)
6. t_ODCV: The deviation of the output from a 50% duty cycle. Output pulse width variations are included in t_SKEW2 and
t_SKEW4 specifications.
7. t_PWH is measured at 2V.
8. t_PWL is measured at 0.8V.
9. t_ORISE and t_OFALL are measured between 0.8V and 2V.
10. t_LOCK: The time that is required before synchronization is achieved. This specification is valid only after V_CC is
stable and within normal operating limits. This parameter is measured from the application of a new signal or
frequency at CLKIN or FB_IN until t_PD is within specified limits.
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