XRT7295AT Datasheet, PDF (10/18 Pages) Exar Corporation – DS3/Sonet STS-1 Integrated Line Receiver

XRT7295AT
OUTPUT JITTER
The total jitter appearing on the RCLK output during
normal operation consists of two components. First,
some jitter appears on RCLK because of jitter on the
incoming signal. (The next section discusses the jitter
transfer characteristic, which describes the relationship
between input and output jitter.) Second, noise sources
within the XRT7295AT device and noise sources that are
coupled into the device through the power supplies and
data pattern dependent jitter due to misequalization of the
input signal, all create jitter on RCLK. The magnitude of
this internally generated jitter is a function of the PLL
bandwidth, which in turn is a function of the input 1s
density. For higher 1s density, the amount of generated
jitter decreases. Generated jitter also depends on the
quality of the power supply bypassing networks used.
Figure 12 shows the suggested bypassing network, and
Table 5 lists the typical generated jitter performance.
12
10
8
6
4
2
0 _{1.0 2.0}
5.0 10 20
Frequency (MHz)
50 100
Figure 7. Loss Characteristic of 728A
Coaxial Cable (450 ft.)
100
80
60
40
20
0
1.0 2.0
5.0 10 20
50 100
Frequency (MHz)
Figure 8. Phase Characteristic of 728A
Coaxial Cable (450 ft.)
JITTER TRANSFER CHARACTERISTIC
The jitter transfer characteristic indicates the fraction of
input jitter that reaches the RCLK output as a function of
input jitter frequency. Table 5 shows Important jitter
transfer characteristic parameters. Figure 9 also shows a
typical characteristic, with the operating conditions as
described in Table 5. Although existing standards do not
specify jitter transfer characteristic requirements, the
XRT7295AT information is provided here to assist in
evaluation of the device.
Parameter
Typ Max
Unit
Generated Jitter¹
All 1s pattern
1.0
ns peak-to-peak
Repetitive “100”
1.5
pattern
ns peak-to-peak
Jitter Transfer
Characteristic²
Peaking
0.05
dB
f 3dB
205
kHz
Notes
1
Repetitive
= 5V T_A =
input data
25°C.
pattern
at
nominal
DSX-3
level
with
V_DD
2 _{Repetitive “100 ” input at nominal DSX-3 level with VDD = 5V,}
T_A = 25°C.
Table 5. Generated Jitter and Jitter Transfer
Characteristics
Rev.1.20
10