ISD9160 Datasheet, PDF (9/23 Pages) List of Unclassifed Manufacturers – ISD Cortex-M0 ChipCorder

Pin No.
LQFP
48
Pin Name
CMP0
SPI_SSB0
10
VCCD
11
VREG
12
NC
13
NC
PA.15
14
TM1
SDIN
PA.9
15
UART_RX
I2S_BCLK
PA.8
16
UART_TX
I2S_FS
17
VCCSPK
18
SPK+
19
VSSSPK
20
SPK-
21
VCCSPK
22
RESETN
23
ICE_DAT
24
ICE_CLK
25
VSSD
PA.7
26
I2S_SDO
PA.6
27
I2S_SDI
PA.5
28
I2S_BCLK
ISD9160 Datasheet
Pin Type
Alt
CFG
Description
AIO
2 Configure as relaxation oscillator for capacitive touch sensing
I/O
3 Slave Select Bar 0 for SPI interface
P
Main Digital Supply for Chip. Supplies all IO except analog,
Speaker Driver and PA<7:0>
P
Logic regulator output decoupling pin. A 1µF capacitor
returning to VSSD must be placed on this pin.
Should remain unconnected.
Should remain unconnected.
I/O
0 General purpose input/output pin; Port A, bit 15
I
1 External input to Timer 1
I
2 Sigma Delta bit stream input for digital MIC mode
I/O
0 General purpose input/output pin; Port A, bit 9
I
1 Receive channel of UART
I/O
2 Bit Clock for I2S interface
I/O
0 General purpose input/output pin; Port A, bit 8
O
1 Transmit channel of UART
I/O
2 Frame Sync Clock for I2S interface
P
Power Supply for PWM Speaker Driver
O
Positive Speaker Driver Output
P
Ground for PWM Speaker Driver
O
Negative Speaker Driver Output
P
Power Supply for PWM Speaker Driver
I
External reset input. Pull this pin low to reset device to initial
state. Has internal weak pull-up.
I/O
Serial Wire Debug port data pin. Has internal weak pull-up.
I
Serial Wire Debug port clock pin. Has internal weak pull-up.
P
Digital Ground.
I/O
0 General purpose input/output pin; Port A, bit 7
O
1 Serial Data Out for I2S interface
I/O
0 General purpose input/output pin; Port A, bit 6
I
1 Serial Data In for I2S interface
I/O
0 General purpose input/output pin; Port A, bit 5
I/O
1 Bit Clock for I2S interface
Release Date: Oct 29, 2011
-9-
Revision V1.20