KAD5512HP Datasheet, PDF (8/31 Pages) List of Unclassifed Manufacturers – High Performance 12-Bit, 250/210/170/125MSPS ADC

KAD5512HP
Pin Descriptions—72QFN
Pin #
LVDS [LVCMOS] Name
1, 6, 19, 24, 71
AVDD
2-5, 13, 14, 17, 18, 28-31 DNC
7, 8, 11, 12, 72
AVSS
9, 10
VINN, VINP
15
VCM
16
CLKDIV
20, 21
CLKP, CLKN
22
OUTMODE
23
NAPSLP
25
RESETN
26, 45, 55, 65
OVSS
27, 36, 56
OVDD
32, 33
D0N, D0P [NC, D0]
34, 35
D1N, D1P [NC, D1]
37, 38
D2N, D2P [NC, D2]
39, 40
D3N, D3P [NC, D3]
41, 42
D4N, D4P [NC, D4]
43, 44
D5N, D5P [NC, D5]
46
RLVDS
47, 48
CLKOUTN, CLKOUTP [NC, CLKOUT]
49, 50
D6N, D6P [NC, D6]
51, 52
D7N, D7P [NC, D7]
53, 54
D8N, D8P [NC, D8]
57, 58
D9N, D9P [NC, D9]
59, 60
D10N, D10P [NC, D10]
61, 62
D11N, D11P [NC, D11]
63, 64
ORN, ORP [NC, OR]
66
SDO
67
CSB
68
SCLK
69
SDIO
70
OUTFMT
Exposed Paddle
AVSS
LVDS [LVCMOS] Function
1.8V Analog Supply
Do Not Connect
Analog Ground
Analog Input Negative, Positive
Common Mode Output
Clock Divider Control
Clock Input True, Complement
Output Mode (LVDS, LVCMOS)
Power Control (Nap, Sleep modes)
Power On Reset (Active Low)
Output Ground
1.8V Output Supply
LVDS Bit 0 (LSB) Output Complement, True [NC, LVCMOS Bit 0]
LVDS Bit 1 Output Complement, True [NC, LVCMOS Bit 1]
LVDS Bit 2 Output Complement, True [NC, LVCMOS Bit 2]
LVDS Bit 3 Output Complement, True [NC, LVCMOS Bit 3]
LVDS Bit 4 Output Complement, True [NC, LVCMOS Bit 4]
LVDS Bit 5 Output Complement, True [NC, LVCMOS Bit 5]
LVDS Bias Resistor (connect to OVSS with a 10kΩ, 1% resistor)
LVDS Clock Output Complement, True [NC, LVCMOS CLKOUT]
LVDS Bit 6 Output Complement, True [NC, LVCMOS Bit 6]
LVDS Bit 7 Output Complement, True [NC, LVCMOS Bit 7]
LVDS Bit 8 Output Complement, True [NC, LVCMOS Bit 8]
LVDS Bit 9 Output Complement, True [NC, LVCMOS Bit 9]
LVDS Bit 10 Output Complement, True [NC, LVCMOS Bit 10]
LVDS Bit 11(MSB) Output Complement, True [NC, LVCMOS Bit 11]
LVDS Over Range Complement, True [NC, LVCMOS Over Range]
SPI Serial Data Output (4.7kΩ pull-up to OVDD is required)
SPI Chip Select (active low)
SPI Clock
SPI Serial Data Input/Output
Output Data Format (Two’s Comp., Gray Code, Offset Binary)
Analog Ground
LVCMOS Output Mode Functionality is shown in brackets (NC = No Connection)
Rev 0.5 Preliminary
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