AT25BCM512B_12 Datasheet, PDF (8/34 Pages) List of Unclassifed Manufacturers – 512-Kilobit 2.7-volt Minimum SPI Serial Flash Memory

8. Program and Erase Commands
8.1 Byte/Page Program
The Byte/Page Program command allows anywhere from a single byte of data to 256 bytes of
data to be programmed into previously erased memory locations. An erased memory location is
one that has all eight bits set to the logical “1” state (a byte value of FFh). Before a Byte/Page
Program command can be started, the Write Enable command must have been previously
issued to the device (see “Write Enable” on page 11) to set the Write Enable Latch (WEL) bit of
the Status Register to a logical “1” state.
To perform a Byte/Page Program command, an opcode of 02h must be clocked into the device
followed by the three address bytes denoting the first byte location of the memory array to begin
programming at. After the address bytes have been clocked in, data can then be clocked into the
device and will be stored in an internal buffer.
If the starting memory address denoted by A23-A0 does not fall on an even 256-byte page
boundary (A7-A0 are not all 0), then special circumstances regarding which memory locations to
be programmed will apply. In this situation, any data that is sent to the device that goes beyond
the end of the page will wrap around back to the beginning of the same page. For example, if the
starting address denoted by A23-A0 is 0000FEh, and three bytes of data are sent to the device,
then the first two bytes of data will be programmed at addresses 0000FEh and 0000FFh while
the last byte of data will be programmed at address 000000h. The remaining bytes in the page
(addresses 000001h through 0000FDh) will not be programmed and will remain in the erased
state (FFh). In addition, if more than 256 bytes of data are sent to the device, then only the last
256 bytes sent will be latched into the internal buffer.
When the CS pin is deasserted, the device will take the data stored in the internal buffer and pro-
gram it into the appropriate memory array locations based on the starting address specified by
A23-A0 and the number of data bytes sent to the device. If less than 256 bytes of data were sent
to the device, then the remaining bytes within the page will not be programmed and will remain
in the erased state (FFh). The programming of the data bytes is internally self-timed and should
take place in a time of t_PP or t_BP if only programming a single byte.
The three address bytes and at least one complete byte of data must be clocked into the device
before the CS pin is deasserted, and the CS pin must be deasserted on even byte boundaries
(multiples of eight bits); otherwise, the device will abort the operation and no data will be pro-
grammed into the memory array. In addition, if the memory is in the protected state (see “Block
Protection” on page 12), then the Byte/Page Program command will not be executed, and the
device will return to the idle state once the CS pin has been deasserted. The WEL bit in the Sta-
tus Register will be reset back to the logical “0” state if the program cycle aborts due to an
incomplete address being sent, an incomplete byte of data being sent, the CS pin being deas-
serted on uneven byte boundaries, or because the memory location to be programmed is
protected.
While the device is programming, the Status Register can be read and will indicate that the
device is busy. For faster throughput, it is recommended that the Status Register be polled
rather than waiting the t_BP or t_PP time to determine if the data bytes have finished programming.
At some point before the program cycle completes, the WEL bit in the Status Register will be
reset back to the logical “0” state.
The device also incorporates an intelligent programming algorithm that can detect when a byte
location fails to program properly. If a programming error arises, it will be indicated by the EPE
bit in the Status Register.
8 AT25BCM512B [Preliminary]
3704BX–DFLASH–11/2012