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N3292X Datasheet, PDF (7/8 Pages) List of Unclassifed Manufacturers – ARM926EJ-S 32-bit RISC CPU with 8KB I-Cache & 8KB D-Cache | |||
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N3292x Brief
ï® Individual configuration supported for each I/O signal
ï® Configurable interrupt control functions supported
ï® Configurable de-bounce circuit supported for interrupt function
ï¬ Audio DAC
ï® 16-bit stereo DAC supported with headphone driver output
ï® H/W volume control supported
ï¬ Audio ADC
ï® 16-bit Sigma-Delta ADC supported
ï¬ General-Purpose ADC (SAR ADC)
ï® Multi-channel, 12-bit ADC supported
ïµ 4 channels dedicated for 4-wire resistive touch sensor inputs
ïµ 3 channels reserved for various purposes, like LVD (Low Voltage Detection), keypad input, and light
sensor
ïµ 5-wire resistive touch sensor interface is also supported
ïµ Input voltage range from 0V ~ 3.3V supported
ï® Maximum 16MHz input clock supported
ï® Maximum 200K/s conversion rate supported
ï® One high-speed channel for 1M SPS sampling rate
ï® LVR (Low Voltage Reset) supported
ï¬ Power Management
ï® Advanced power management including Power Down, Deep Standby, CPU Standby, and Normal Operating
modes
ïµ Normal Operating Mode
ï¬ Core power is 1.2V and chip is in normal operation
ïµ CPU Standby Mode
ï¬ Core power is 1.2V and only ARM CPU clock is turned OFF
ïµ Deep Standby Mode
ï¬ Core power is 1.2V and all IP clocks are turned OFF
ïµ Power Down Mode
ï¬ Only the RTC power is ON. Other 3.3V and 1.2V power are OFF
ï¬ Operating Voltage
ï® I/O: 3.3V
ï® Core: 1.2V
ï® DDR2: 1.9V
ï¬ Package
ï® LQFP-128
Nuvoton Technology Corp.
http://www.nuvoton.com/
-7-
Release Date: Feb. 2014
Revision A3
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