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N3292X Datasheet, PDF (2/8 Pages) List of Unclassifed Manufacturers – ARM926EJ-S 32-bit RISC CPU with 8KB I-Cache & 8KB D-Cache
N3292x Brief
FEATURES
 CPU
 ARM926EJ-S 32-bit RISC CPU with 8KB I-Cache & 8KB D-Cache
 Frequency up to 240MHz@1.2V for typical operation condition
 JTAG interface supported for development and debugging
 Internal SRAM & ROM
 16KB IBR internal booting ROM supported
 IBR booting messages displayed by UART console for debugging supported
 Different system booting modes supported:
 Memory Card
 SD card
 SD-to-NAND flash bridge
 NAND Interface
 Raw NAND Flash
 OTP ROM (N23512T / N231GT, MXIC ExtraROM)
 SPI Flash
 USB Mass Storage
 DRAM MCP
 16Mbx16 DDR2 MCP for N32925UxDNxx
 32Mbx16 DDR2 MCP for N32926UxDNxx
 EDMA (Enhanced DMA)
 Totally 11 DMA channels supported
 8 peripheral DMA channels for transfer between memory and on-chip peripherals, such as ADC,
UART and SPI
 3 dedicated channels for memory-to-memory transfer
 Byte, half-word and word data width types supported
 Single and burst transfer modes supported
 Block transfer supported in memory-to-memory transfer channel
 Color format transformation supported in memory-to-memory transfer channel
 Source color format could be RGB555, RGB565 and YCbCr422
 Destination color format could be RGB555, RGB565 and YCbCr422
 Auto reload supported for continuous data transfer
 Interrupt generation supported in the half-of-transfer or end-of-transfer
 Capture (CMOS Image Sensor I/F)
 CCIR601 & CCIR656 interfaces supported for connection to CMOS image sensor
 Resolution up to 3M pixels
 YUV422 and RGB565 color format supported for data-in from CMOS sensor
 YUV422, RGB565, RGB555 and Y-only color format supported for data storing to system memory
 Planar and packet data formats supported for data storing to system memory
 Image cropping supported with the cropping window up to 4096x2048
 Image scaling-down supported
 Vertical and horizontal scaling-down for preview mode supported
 The scaling factor is N/M
 Two pairs of configurable 16-bit N and 16-bit M for vertical and horizontal scaling-down
 The value of N has to equal to or less than M
Nuvoton Technology Corp.
http://www.nuvoton.com/
-2-
Release Date: Feb. 2014
Revision A3