W77L532A Datasheet, PDF (6/88 Pages) List of Unclassifed Manufacturers – 8-BIT MICROCONTROLLER

W77L532A
5. FUNCTIONAL DESCRIPTION
The W77L532 is 8052 pin compatible and instruction set compatible. It includes the resources of the
standard 8052 such as four 8-bit I/O Ports, three 16-bit timer/counters, full duplex serial port and
interrupt sources.
The W77L532 features a faster running and better performance 8-bit CPU with a redesigned core
processor without wasted clock and memory cycles. it improves the performance not just by running at
high frequency but also by reducing the machine cycle duration from the standard 8052 period of twelve
clocks to four clock cycles for the majority of instructions. This improves performance by an average of
1.5 to 3 times. The W77L532 also provides dual Data Pointers (DPTRs) to speed up block data
memory transfers. It can also adjust the duration of the MOVX instruction (access to off-chip data
memory) between two machine cycles and nine machine cycles. This flexibility allows the W77L532 to
work efficiently with both fast and slow RAMs and peripheral devices. In addition, the W77L532
contains on-chip 1KB MOVX SRAM, the address of which is between 0000H and 03FFH. It only can be
accessed by MOVX instruction; this on-chip SRAM is optional under software control.
The W77L532 is an 8052 compatible device that gives the user the features of the original 8052 device,
but with improved speed and power consumption characteristics. It has the same instruction set as the
8051 family, with one addition: DEC DPTR (op-code A5H, the DPTR is decreased by 1). While the
original 8051 family was designed to operate at 12 clock periods per machine cycle, the W77L532
operates at a much reduced clock rate of only 4 clock periods per machine cycle. This naturally speeds
up the execution of instructions. Consequently, the W77L532 can run at a higher speed as compared to
the original 8052, even if the same crystal is used. Since the W77L532 is a fully static CMOS design, it
can also be operated at a lower crystal clock, giving the same throughput in terms of instruction
execution, yet reducing the power consumption.
The 4 clocks per machine cycle feature in the W77L532 is responsible for a three-fold increase in
execution speed. The W77L532 has all the standard features of the 8052, and has a few extra
peripherals and features as well.
I/O Ports
The W77L532 has four 8-bit ports and one extra 4-bit port. Port 0 can be used as an Address/Data bus
when external program is running or external memory/device is accessed by MOVC or MOVX
instruction. In these cases, it has strong pull-ups and pull-downs, and does not need any external pull-
ups. Otherwise it can be used as a general I/O port with open-drain circuit. Port 2 is used chiefly as the
upper 8-bits of the Address bus when port 0 is used as an address/data bus. It also has strong pull-ups
and pull-downs when it serves as an address bus. Port 1 and 3 act as I/O ports with alternate functions.
Port 4 is only available on 44-pin PLCC/QFP package type. It serves as a general purpose I/O port as
Port 1 and Port 3. The P4.0 has an alternate function CP / RL2 which is the wait state control signal.
When wait state control signal is enabled, P4.0 is input only.
Serial I/O
The W77L532 has two enhanced serial ports that are functionally similar to the serial port of the original
8052 family. However the serial ports on the W77L532 can operate in different modes in order to obtain
timing similarity as well. Note that the serial port 0 can use Timer 1 or 2 as baud rate generator,
but the serial port 1 can only use Timer 1 as baud rate generator. The serial ports have the
enhanced features of Automatic Address recognition and Frame Error detection.
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