PS13201 Datasheet, PDF (6/22 Pages) List of Unclassifed Manufacturers – 500MHz 75dB Logarithmic/Limiting Amplifier

PS13201
APPLICATION NOTES
1) VIDEO–AMPLIFIER
The PS13201 uses a single ended Video amplifier to produce a trimmable Video transfer characteristic. Both the
gain (Slope) and Offset of the amplifier can be externally adjusted.
a) Gain and Offset trimming (ref Applications circuits in Figs 5 and 6)
The Gain and Offset control is achieved by adjusting RG and RO respectively. The control is dependent upon their
difference from the Trim reference resistor, RT. Adjustment of Gain has an effect on Offset, but adjustment of Offset
does NOT affect the Gain. Therefore the Gain should be optimised first. The Offset should only be adjusted once the
Gain has been set.
Fig 7 shows the variation of Video Offset with value of RO, for a fixed value of RT and RG = 1k5Ω.
Fig 8 shows the variation of Video Slope with value of RG, for a fixed value of RT and RO = 1k5Ω.
The Video amplifier incorporates temperature compensation for Video gain (Slope). To ensure temperature
stability for Video gain (Slope) over the operating temperature range, it is recommended that the resistors with
identical temperature coefficients of resistance are used for RT and RG.
The Video amplifier does NOT incorporate temperature compensation for Video Offset. Although it is recommended
that a resistor with identical temperature coefficient of resistance to RT be used for RO, it may be necessary to use
an additional external temperature compensating network.
b) Video performance
The Video–amplifier has a critically damped rise time of 16ns (10% - 90%).In order to achieve this transient
performance, it is important to ensure that:-
i) the resistor connected to Trim reference (pin 18), has a nominal resistance of 1.5kΩ, with a parasitic
capacitance LESS than 5pF.
ii) the load applied to the Video Output (pin 13) does NOT exceed 200Ω resistance in parallel with 20pF.
Also, the following decoupling should be incorporated:-
i) The Video Output _VCC (pin 14) should be decoupled with a 10nF capacitor to the RETURN line from the video
load, connected to Video GND (pin 16), avoiding any common impedance path.
ii) The Video Output Vee (pin 12) should be decoupled with a 10nF capacitor DIRECTLY to Video-Output _VCC
(pin 14).
2) PS13201 AS A LOG AMPLIFIER with RF output buffer disabled (pin 8 floating)
If the PS13201 is to be used as a logarithmic successive detection amplifier only, with no requirement for a limited RF
Output, the RF input (pins 27 and 28) can be driven EITHER differentially or single ended from a 50Ω source. If being
used with a single ended input, the SIGNAL should be applied to pin 27 and the RETURN should be connected to pin
28, as shown in the Application circuit diagram in Fig 5.
The PS13201 is VERY stable when used in this way. Although not a crucial requirement, it is recommended that the
device should be mounted using a ground plane.
3) PS13201 AS A LOG/LIMITING AMPLIFIER- with RF Output-Buffer ENABLED (pin 8 connected to GND)
If the PS13201 is to be used as a limiting or Log/limiting amplifier with a requirement for a Limited RF Output signal,
care is required in the layout of components and connections around the device to ensure stability. The following
precautions should be observed (refer to Application circuit diagram in Fig. 6):-
Data Sheet 210892 issue 3
Plessey Semiconductors Ltd.
Design & Technology Centre, Delta 500, Delta Business Park, Great Western Way, Swindon, UK SN5 7XE
Tel: [phone]
Fax: [phone]
Web: www.plesseysemi.com
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