AK4620BVFP-E2 Datasheet, PDF (36/42 Pages) List of Unclassifed Manufacturers – 24-Bit 192kHz Audio CODEC with IPGA

ASAHI KASEI
[AK4620B]
Digital Ground
System
Controller
Analog Ground
1 VCOM
AOUTR+ 30
2 AINR+
AOUTR- 29
3 AINR-/NC
AOUTL+ 28
4 AINL+
AOUTL- 27
5 AINL-/NC
DGND 26
6 VREF AK4620B VD 25
7 AGND
8 ^VA
VT 24
ADMODE 23
9 P/S
DEM0 22
10 MCLK
PDN 21
11 LRCK
DFS0 20
12 BICK
CSN/DIF 19
13 SDTO
CCLK/CKS1 18
14 SDTI
CDTI/CKS0 17
15 OVFR/DZFR
OVFL/DZFL 16
Figure 16. Ground Layout
1. Grounding and Power Supply Decoupling
The AK4620B requires careful attention to power supply and grounding layout. To minimize coupling from digital noise,
decoupling capacitors should be connected to VA, VD and VT respectively. VA is supplied from the analog supply in the
system, and VD and VT are supplied from the digital supply in the system. Power lines of VA, VD and VT should be
distributed separately from the point with low impedance of regulator etc. The power up sequence is not critical among
VA, VD and VT. AGND and DGND must be connected to one analog ground plane. Decoupling capacitors
should be as near to the AK4620B as possible, with the small value ceramic capacitor being the nearest.
2. Voltage Reference
The differential voltage between VREF and AGND sets the analog input/output range. VREF pin is normally connected
to VA with a 0.1µF ceramic capacitor. VCOM is the signal ground of this chip. A 10µF electrolytic capacitor in parallel
with a 0.1µF ceramic capacitor attached to VCOM pin eliminates the effects of high frequency noise. No load current may
be drawn from VCOM pin. All signals, especially clocks, should be kept away from the VREF and VCOM pins in order
to avoid unwanted coupling into the AK4620B.
3. ADC Output
The ADC output data format is 2’s complement. The DC offset, including the ADC’s own DC offset, is removed by the
internal HPF. The AK4620B samples the analog inputs at 128fs. The digital filter rejects noise above the stopband except
for multiples of 128fs.
MS0401-E-00
- 36 -
2005/07