LM3S611 Datasheet, PDF (359/409 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S611 Data Sheet
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C
This register provides a summary of the interrupt status of the individual PWM generator blocks. A
bit set to 1 indicates that the corresponding generator block is asserting an interrupt. The individual
interrupt status registers in each block must be consulted to determine the reason for the interrupt,
and used to clear the interrupt. For the fault interrupt, a write of 1 to that bit position clears the
latched interrupt status.
PWM Interrupt Status and Clear (PWMISC)
Offset 0x01C
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
IntFault
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W1C
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
IntPWM2 IntPWM1 IntPWM0
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:17
16
15:3
2
1
0
Name
reserved
IntFault
reserved
IntPWM2
IntPWM1
IntPWM0
Type
RO
R/W1C
RO
RO
RO
RO
Reset
0
0
0
0
0
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
Indicates if the fault input is asserting an interrupt.
Reserved bits return an indeterminate value, and should
never be changed.
Indicates if the PWM generator 2 block is asserting an
interrupt.
Indicates if the PWM generator 1 block is asserting an
interrupt.
Indicates if the PWM generator 0 block is asserting an
interrupt.
April 27, 2007
359
Preliminary