FGSD12SR6003A Datasheet, PDF (35/41 Pages) List of Unclassifed Manufacturers – 3-14.4Vdc Input, 3A, 0.45-5.5Vdc Output

Delivering Next Generation Technology
FGSD12SR6003*A
3-14.4Vdc Input, 3A, 0.45-5.5Vdc Output
Example Application Circuit
Series
Preliminary Data Sheet
Requirements:
Vin:
12V
Vout:
1.8V
Iout:
2.25A max., worst case load transient is from 1.5A to 2.25A
Vout:
1.5% of Vout (27mV) for worst case load transient
Vin, ripple
1.5% of Vin (180mV, p-p)
Vin+
CI3 CI2 CI1
GND
VIN
PGOOD
VOUT
VS+
MODULE
SEQ
CLK
DATA
SMBALRT#
TRIM
ADDR0
ADDR1
ON/OFF
SIG_GND
SYNC GND VS-
RTUNE
CTUNE
RTrim
RADDR1 RADDR0
Vout+
CO1 CO2 ^CO3
CI1
CI2
CI3
CO1
CO2
CO3
CTune
RTune
RTrim
Decoupling cap - 1x0.047uF/16V ceramic capacitor (e.g. Murata LLL185R71C473MA01)
1x22uF/16V ceramic capacitor (e.g. Murata GRM32ER61C226KE20)
470uF/16V bulk electrolytic
Decoupling cap - 1x0.047uF/16V ceramic capacitor (e.g. Murata LLL185R71C473MA01)
-
1x330uF
2200pF ceramic capacitor (can be 1206, 0805 or 0603 size)
220Ω SMT resistor (can be 1206, 0805 or 0603 size)
10k SMT resistor (can be 1206, 0805 or 0603 size, recommended tolerance of 0.1%)
Note: The DATA, CLK and SMBALRT pins do not have any pull-up resistors inside the module.
Typically, the SMBus master controller will have the pull-up resistors as well as provide the driving
source for these signals.
Http://www.fdk.com
Page 35 of 41
Ver 1.6 May. 8, 2013