PI33XX-X0 Datasheet, PDF (32/42 Pages) List of Unclassifed Manufacturers – 8V to 36Vin Cool-Power ZVS B uck Regulator Family

Functional Description
The PI33XX is a family of highly integrated ZVS-Buck
regulators. The PI33XX has a set output voltage that is
trimmable within a prescribed range shown in Table
1. Performance and maximum output current are
characterized with a specific external power inductor
(see Table 5).
L1
Vin
Vin
VS1
Cin
PI33XX
PGND
Vout
REM
SYNCI
SYNCO
EN
TRK
ADJ
EAO
Vout
Cout
Figure 2 - ZVS-Buck with required components
For basic operation, Figure 2 shows the connections
and components required. No additional design or
settings are required.
ENABLE (EN)
EN is the enable pin of the converter. The EN Pin is
referenced to SGND and permits the user to turn the
converter on or off. The EN default polarity is a
positive logic assertion. If the EN pin is left floating or
asserted high, the converter output is enabled.
Pulling EN pin below 0.8 Vdc with respect to SGND
will disable the regulator output.
The EN input polarity can be programmed (PI33XX-20
and PI33XX-21 versions only) via the I²C data bus.
When the EN pin polarity is programmed for negative
logic assertion; and if the EN pin is left floating, the
regulator output is enabled. Pulling the EN pin above
1.0 Vdc with respect to SGND, will disable the
regulator output.
Switching Frequency Synchronization
The SYNCI input allows the user to synchronize the
controller switching frequency by an external clock
referenced to SGND. The external clock can
synchronize the unit between 50% and 110% of the
preset switching frequency (f_S). For PI33XX-20 and
PI33XX-21 versions only, the phase delay can be
programmed via I²C bus with respect to the clock
PI33XX-X0
applied at SYNCI pin. Phase delay allows PI33XX
regulators to be paralleled and operate in an
interleaving mode.
The PI33XX default for SYNCI is to sync with respect
to the falling edge of the applied clock providing 180°
phase shift from SYNCO. This allows for the
paralleling of two PI33XX devices without the need
for further user programming or external sync clock
circuitry. The user can change the SYNCI polarity to
sync with the external clock rising edge via the I²C
data bus (PI33XX-20 and PI33XX-21 versions only).
When using the internal oscillator, the SYNCO pin
provides a 5V clock that can be used to sync other
regulators. Therefore, one PI33XX can act as the lead
regulator and have additional PI33XXs running in
parallel and interleaved.
Output Voltage Trim
The PI33XX output voltage can be trimmed up from
the preset output by connecting a resistor from ADJ
pin to SGND and can be trimmed down by connecting
a resistor from ADJ pin to VOUT. The Table 2 defines
the voltage ranges for the PI33XX family.
Device
PI3311-X0-LGIZ
PI3318-X0-LGIZ
PI3312-X0-LGIZ
PI3301-X0-LGIZ
PI3302-X0-LGIZ
PI3303-X0-LGIZ
PI3305-X0-LGIZ
Output Voltage
Set
Range
1.0V
1.0 to 1.4V
1.8V
1.4 to 2.0V
2.5V
2.0 to 3.1V
3.3V
2.3 to 4.1V
5.0V
3.3 to 6.5V
12V 6.5 to 13.0V
15V 10.0 to 16.0V
Table 2 - PI33XX family output voltage ranges.
Soft-Start
The PI33XX includes an internal soft-start capacitor to
ramp the output voltage in 2ms from 0V to full
output voltage. Connecting an external capacitor
from the TRK pin to SGND will increase the start-up
ramp period. See, “Soft Start Adjustment and Track,”
vicorpower.com
800 735.6200
Rev 1.4
11/2012
Cool-Power^®
Page 32 of 42