M058SFAN Datasheet, PDF (32/72 Pages) List of Unclassifed Manufacturers – 32-bit Microcontroller

NuMicro M058S Series Datasheet
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40-43
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46-47
0x58
0x5C
0x60
0x64
0x68
0x6C
0x70
0x74
0x78
0x7C
0x80
0x84
0x88
0x8C
0x90
0x94
0x98
0x9C
0x90-0xAC
0xB0
0xB4
0xB8-0xBC
6
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PWMA_INT
PWM0~3
PWM0, PWM1, PWM2 and PWM3
interrupt
No
Reserved
-
-
-
TMR0_INT
TMR0
Timer 0 interrupt
No
TMR1_INT
TMR1
Timer 1 interrupt
No
TMR2_INT
TMR2
Timer 2 interrupt
No
TMR3_INT
TMR3
Timer 3 interrupt
No
UART0_INT UART0 UART0 interrupt
Yes
Reserved
-
-
-
SPI0_INT
SPI0
SPI0 interrupt
No
Reserved
-
-
-
GP5_INT
GPIO
External signal interrupt from
P5[7:0]
Yes
GP67_INT
I2C0_INT
I2C1_INT
CAP0_INT
GPIO
I²C0
I²C1
PWM
External signal interrupt from
P6[7:0] / P7[1:0]
Yes
I²C0 interrupt
Yes
I²C1 interrupt
Yes
PWM0 capture in interrupt
No
CAP1_INT
PWM
PWM1 capture in interrupt
No
CAP2_INT
PWM
PWM2 capture in interrupt
No
CAP3_INT
PWM
PWM3 capture in interrupt
No
Reserved
-
-
-
PWRWU_INT CLKC
Clock controller interrupt for chip
wake-up from Power-down state
Yes
ADC_INT
ADC
ADC interrupt
No
Reserved
-
-
Table 6.2-3 System Interrupt Map Vector Table
6.2.7.2 Vector Table
When an interrupt is accepted, the processor will automatically fetch the starting address of the
interrupt service routine (ISR) from a vector table in memory. For ARMv6-M, the vector table base
address is fixed at 0x00000000. The vector table contains the initialization value for the stack
pointer on reset, and the entry point addresses for all exception handlers. The vector number on
previous page defines the order of entries in the vector table associated with exception handler
Nov. 27, 2014
Page 32 of 72
Rev.1.03