M054ZBN Datasheet, PDF (30/68 Pages) List of Unclassifed Manufacturers – 32-BIT MICROCONTROLLER

NuMicro^™ M052/M054BN Data Sheet
6.3.3 System Clock & SysTick Clock
The system clock has 4 clock sources which were generated from clock generator block. The
clock source switch depends on the register HCLK_S(CLKSEL0[2:0]). The block diagram is
shown in the Figure 6-4.
HCLK_S (CLKSEL0[2:0])
22.1184 MHz
111
10 kHz
011
PLLFOUT
010
Reserved
001
4~24 MHz
000
CPU in Power Down Mode
1/(HCLK_N+1)
HCLK_N (CLKDIV[3:0])
CPUCLK
HCLK
PCLK
CPU
AHB
APB
Figure 6-4 System Clock Block Diagram
The clock source of SysTick in Cortex-M0 core can use CPU clock or external clock
(SYST_CSR[2]). If using external clock, the SysTick clock (STCLK) has 4 clock sources. The
clock source switch depends on the setting of the register STCLK_S (CLKSEL0[5:3]. The block
diagram is shown in the Figure 6-5.
22.1184 MHz
1/2
HCLK
1/2
4~24 MHz
1/2
Reserved
4~24 MHz
STCLK_S (CLKSEL0[5:3])
111
011
STCLK
010
001
000
Figure 6-5 SysTick clock Control Block Diagram
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Publication Release Date: Mar. 19, 2012
Revision V1.01