MC3413 Datasheet, PDF (29/47 Pages) List of Unclassifed Manufacturers – Axis Accelerometer

MC3413 3-Axis Accelerometer
Preliminary Datasheet
11.2 SR STATUS REGISTER
This register contains the flag/event bits for tap detection and sample acquisition. The TAP bits
will only transition if the corresponding enable bit has been set in register 0x09, the TAP
control register. Each read to this register will clear the latched event(s) and re-arm the flag for
the next event.
Addr Name
0x03 TAPR
Description
Tap Status
Register
Bit 7 Bit 6
ACQ_INT Resv
Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
TAP_ZN TAP_ZP TAP_YN TAP_YP TAP_XN TAP_XP
POR R/
Value W
0x00 R
TAP_XP ^{Positive X-axis TAP detected, flag is set in polling mode or interrupt mode.}
TAP_XN ^{Negative X-axis TAP detected, flag is set in polling mode or interrupt mode.}
TAP_YP ^{Positive Y-axis TAP detected, flag is set in polling mode or interrupt mode.}
TAP_YN ^{Negative Y-axis TAP detected, flag is set in polling mode or interrupt mode.}
TAP_ZP ^{Positive Z-axis TAP detected, flag is set in polling mode or interrupt mode.}
TAP_ZN ^{Negative Z-axis TAP detected, flag is set in polling mode or interrupt mode.}
ACQ_INT
Sample has been acquired, flag bit is set in polling mode or interrupt mode. This bit
cannot be disabled and is always set be hardware when a sample is ready. The host
must poll at the sample rate or faster to see this bit transition.
Table 12. SR Status Register
mCube Proprietary.
APS-048-0029v1.7
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