MC3413 Datasheet, PDF (21/47 Pages) List of Unclassifed Manufacturers – Axis Accelerometer

MC3413 3-Axis Accelerometer
Preliminary Datasheet
8 INTERRUPTS
The sensor device utilizes output pin INTN to signal to an external microprocessor that an
event has been sensed. The microprocessor would contain an interrupt service routine which
would perform certain tasks after receiving this interrupt and reading the associated status bits,
perhaps after a sample was made ready. If interrupts are to be used, the microprocessor must
set up the registers in the sensor so that when a specific event is detected, the microprocessor
would receive the interrupt and the interrupt service routine would be executed. If polling is
used there is no need for the interrupt registers to be set up.
For products that will instead use polling, the method of reading sensor data would be slightly
different. Instead of receiving an interrupt when an event occurs, the microprocessor must
periodically poll the sensor and read status data (the INTN pin is not used). For most
applications, this is likely best done at the sensor sampling rate or faster.
Note that at least one I2C STOP condition must be present between samples in order for
the sensor to update the sample data registers.
8.1 ENABLING AND CLEARING INTERRUPTS
The SR Status Register contains the flag bits for the sample acquisition interrupt ACQ_INT.
The INTEN Interrupt Enable Register determines if a flag event generates interrupts.
The flags (and interrupts) are cleared and rearmed each time the SR Status Register is read.
When an event is detected, it is masked with a flag bit in the INTEN Interrupt Enable Register,
and then the corresponding status bit is set in the SR Status Register.
The polarity and driving mode of the external interrupt signal may be chosen by setting the IPP
and IAH bits in the MODE Register.
8.2 ACQ_INT INTERRUPT
The ACQ_INT flag bit in the SR Status Register is always active. This bit is cleared when it is
read. When a sample has been produced, an interrupt will be generated only if the
ACQ_INT_EN bit in the INTEN Interrupt Enable Register is active. Note that the frequency of
this ACQ_INT bit being set active is always the same as the sample rate.
mCube Proprietary.
APS-048-0029v1.7
© 2014 mCube Inc. All rights reserved.
21 / 47