TC5747 Datasheet, PDF (23/44 Pages) List of Unclassifed Manufacturers – Single Chip CMOS Imager with Integrated Image Signal Processor and JPEG Codec

TC5747 Preliminary Data Sheet
Single Chip CMOS Imager
4.2 Parallel Video Interface (PVI)
The PVI generates the video output of the TC5747. The interface consists of a vertical frame-start signal and
a 10-bit parallel data bus with clock and qualify signals. It supports parallel and serial modes of operation.
4.2.1 Parallel Mode of Operation
The PVI produces a clock signal (the CLK_OUT pin), a 10-bit data bus, DOUT[9:0] and qualifying signals that
are synchronous to that clock. On each determining edge of CLK_OUT, a single data byte is transferred on
the data bus, if qualified by the VALIDH signal.
Figure 9: PVI Qualification Signal Timing
Valid data are qualified by the VALIDH signal. The VALIDH signal is activated only when image data is sent
out on the parallel interface. It is inactive when dark lines are read, or during the vertical blank period. The
VALIDH signal can be configured to qualify only the valid image data, or to qualify optional Start-of-line and
End-of-line markers.
Figure 10: Vertical and Horizontal Qualify Signals
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