TC5747 Datasheet, PDF (19/44 Pages) List of Unclassifed Manufacturers – Single Chip CMOS Imager with Integrated Image Signal Processor and JPEG Codec

TC5747 Preliminary Data Sheet
Single Chip CMOS Imager
4. TC5747MF24L Interfaces
The TC5747MF24L chip has the following interfaces:
I²C or UART control interface
Parallel Video Interface (PVI)
Serial Video Interface (SVI)
4.1 I²C Serial Interface
4.1.1 Overview
The I²C interface is a two-wire bi-directional serial bus. The TC5747 can operate as a slave device only.
Both wires (SCL and SDA) are connected to a positive supply via a pull-up resistor, and when the bus is free
both lines are high. The output stage of the device must have an open-drain or open collector type IO cell so
that a wired-AND function between all devices that are connected on the bus can be performed.
Each device is recognized by a unique 7-bit address. The address allocated to TC5747-B0 is 0x47. When
performing write operations, add 0 to the LSB to get 0x8E. For a Read operation add 1 to the LSB to get
0x8F.
To summarize:
Address
0x47
I²C Write
0x8E
I²C Read
0x8F
Note: Some operating systems automatically add the 1 or 0 bit to the 7 bit address. The address for the
TC5747-A0 is 0x47.
A control of the byte order in I²C transactions is provided through setting a register.
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