KXTI9-1001 Datasheet, PDF (23/54 Pages) List of Unclassifed Manufacturers – 2g/4g/8g Tri-axis Digital Accelerometer Specifications

± 2g / 4g / 8g Tri-axis Digital
Accelerometer Specifications
PART NUMBER:
KXTI9-1001
Rev. 2
Jul-2011
INT reports the combined interrupt information of all enabled functions. This bit is released to
0 when the interrupt source latch register (1Ah) is read.
INT = 0 – no interrupt event
INT = 1 – interrupt event has occurred
INT_REL
Latched interrupt source information (INT_SRC_REG1 and INT_SRC_REG2), the status register, and
the physical interrupt pin (7) are cleared when reading this register.
R
R
R
R
R
R
R
R
X
X
X
X
X
X
X
X
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
I²C Address: 0x1Ah
CTRL_REG1
Read/write control register that controls the main feature set.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PC1
RES DRDYE GSEL1 GSEL0 TDTE WUFE
TPE
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
I²C Address: 0x1Bh
Reset Value
00000000
PC1 controls the operating mode of the KXTI9.
PC1 = 0 - stand-by mode
PC1 = 1 – operating mode
RES determines the performance mode of the KXTI9. Note that to change the value of this
bit, the PC1 bit must first be set to “0”.
RES = 0 – low current, 8-bit valid
RES = 1- high current, 12-bit valid
DRDYE enables the reporting of the availability of new acceleration data on the interrupt.
Note that to change the value of this bit, the PC1 bit must first be set to “0”.
DRDYE = 0 – availability of new acceleration data not reflected on interrupt pin (7)
DRDYE = 1- availability of new acceleration data reflected on interrupt pin (7)
GSEL1, GSEL0 selects the acceleration range of the accelerometer outputs per Table 12.
Note that to change the value of this bit, the PC1 bit must first be set to “0”.
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