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RFM110W Datasheet, PDF (17/22 Pages) List of Unclassifed Manufacturers – Low-Cost Consumer Electronics Applications
RFM110W/RFM117W
Parameter
Digital Input Level High
Digital Input Level Low
CLK Frequency
CLK High Time
CLK Low Time
CLK Delay Time
DATA Delay Time
DATA Setup Time
DATA Hold Time
Table 13. TWI Requirements
Symbol
Conditions
VIH
VIL
FCLK
tCH
tCL
CLK delay time for the first falling edge of the
tCD
TWI_RST command, see Figure 20
The data delay time from the last CLK rising
tDD edge of the TWI command to the time DATA
return to default state
tDS
From DATA change to CLK falling edge
tDH From CLK falling edge to DATA change
Min Typ Max Unit
0.8
VDD
0.2
VDD
10
1,000 kHz
500
ns
500
ns
20
15,000 ns
15,000 ns
20
ns
200
ns
CLK
tCH tCL
tDS tDH
DATA
Figure 18. Two-wire Interface Timing Diagram
Once the device is powered up, TWI_RST and SOFT_RST should be issued to make sure the device works in SLEEP state
robustly. On every transmission, TWI_RST and TWI_OFF should be issued before the transmission to make sure the TWI
circuit functions correctly. TWI_RST and SOFT_RST should be issued again after the transmission for the device going back to
SLEEP state reliably till the next transmission. The operation flow with TWI is shown as the figure below.
Reset TWI
(1) ‐ TWI_RST
(2) ‐ SOFT_RST
One Transmission Cycle
One Transmission Cycle
(1) ‐ TWI_RST
(2) ‐ TWI_OFF
TRANSMISSION
(1) ‐ TWI_RST
(2) ‐ SOFT_RST
(1) ‐ TWI_RST
(2) ‐ TWI_OFF
TRANSMISSION
Figure 19. RFM110W/RFM117W Operation Flow
with TWI
(1) ‐ TWI_RST
(2) ‐ SOFT_RST
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