RFM110W Datasheet, PDF (16/22 Pages) List of Unclassifed Manufacturers – Low-Cost Consumer Electronics Applications

RFM110W/RFM117W
6.2.1 Tx Enabled by DATA Pin Rising Edge
As shown in the Figure 16, once the RFM110W/RFM117W detects a rising edge on the DATA pin, it goes into the XO-
STARTUP state. ^{The user has to pull the DATA pin high for at least 10 ns (t}HOLD^{) after detecting the rising edge, as well as wait}
for the sum of t_XTAL and t_TUNE before sending any useful information (data to be transmitted) into the chip on the DATA pin. The
logic state of the DATA pin is “Don't Care” from the end of t_HOLD till the end of t_TUNE. In the TRANSMIT state, PA sends out the
input data after
they are modulated. The user has to pull the DATA pin low for t_STOP in order to end the transmission.
SLEEP XO-STARTUP TUNE
STATE
Rising Edge
DATA pin 0
PA out
tXTAL
tTUNE
1
Don’t Care
tHOLD
TRANSMIT
Valid Transmitted Data
RF Signals
SLEEP
tSTOP
0
Figure 16. Transmission Enabled by DATA Pin Rising Edge
6.2.2 Tx Enabled by DATA Pin Falling Edge
As shown in the Figure 17, once the RFM110W/RFM117W detects a falling edge on the DATA pin, it goes into XO-STARTUP
state and the XO starts to work. During the XO-STARTUP state, the DATA pin needs to be pulled low. After the XO is settled,
the RFM110W/RFM117W goes to the TUNE state. The logic state of the DATA pin is “Don't Care” during the TUNE state. In
the ^{TRANSMIT state, PA sends out the input data after they are modulated. The user has to pull the DATA pin low for t}STOP ⁱⁿ
order
to end the transmission. Before starting the next transmit cycle, the user has to pull the DATA pin back to high.
SLEEP XO-STARTUP TUNE
STATE
Falling Edge
DATA pin
1
tXTAL
tTUNE
0
Don’t Care
PA out
TRANSMIT
Valid Transmitted Data
RF Signals
SLEEP
tSTOP
0
1
Figure 17. Transmission Enabled by DATA Pin Falling Edge
6.2.3 Two-wire Interface
For power-saving and reliable transmission purposes, the RFM110W/RFM117W is recommended to communicate with the
host MCU over a two-wire interface (TWI): DATA and CLK. The TWI is designed to operate at a maximum of 1 MHz. The
timing requirement and data transmission control through the TWI are shown in this section.
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