NUC442JI8AE Datasheet, PDF (15/228 Pages) –

NUC442
– Supports DMA master
Cryptographic Accelerator
– DES/TDES accelerator
 Supports hardware DES (Data Encryption Standard)/TDES (Triple DES)
accelerator
 Supports 56, 112 and 168-bit keys
 Supports ECB, CBC, CFB, OFB and CTR modes
 Compliant with NIST 800 38A
– AES accelerator
 Supports hardware AES (Advanced Encryption Standard) accelerator
 Supports 128-, 192- and 256-bit keys
 Supports ECB, CBC, CFB, OFB and CTR modes
 Compliant with NIST 800 38A
– Secure Hash Function accelerator
 Supports hardware SHA (Secure Hash) accelerator
 Supports SHA-1 and SHA-224, -256
 Compliant with FIPS 180-2
Random Number Generator
– Supports random bit generator
– Supports a random number generator programmable 64, 128, 192 and 256 bits
Image Capture Interface
– CCIR601 & CCIR656 interfaces supported for connection to CMOS image sensor
– Resolution up to 3M pixel
– YUV422 and RGB565 color format supported for data-in from CMOS sensor
– YUV422, RGB565, RGB555 and Y-only color format supported for data storing to
system memory
– Planar and packet data format supported for data storing to system memory
– Image cropping supported with the cropping window up to 4096x2048
– Image scaling-down supported
– Vertical and horizontal scaling-down for preview mode supported
– Scaling factor as N/M
– Two pairs of configurable 8-bit N and 8-bit M for vertical and horizontal scaling-down
– The value of N has to be equal to or less than M
– Frame rate control supported
– Combines two interlace fields to a single frame supported for data in from TV-decoder
Cyclic Redundancy Calculation Unit
– Supports four common polynomials CRC-CCITT, CRC-8, CRC-16, and CRC-32
– Programmable initial value
– Supports programmable order reverse setting for input data and CRC checksum
– Supports programmable 1’s complement setting for input data and CRC checksum
– Supports 8/16/32-bit of data width
– Interrupt generated once checksum error occurs
 ADC
– Supports two operating modes: ADC mode and EADC (Enhance ADC mode with dual
ADC Sampling)
– Selected as ADC mode
 Supports single 12-bit ADC conversion
 Analog input voltage range: 0~AV_DD
 Up to 12 external single-ended analog input channels
 Up to 6 differential analog input pairs
 Supports single ADC interrupt
 Supports easy control for power saving
June 16, 2016
Page 15 of 228
Rev 1.09