RFM75 Datasheet, PDF (14/27 Pages) List of Unclassifed Manufacturers – Low Power High Performance 2.4 GHz GFSK Transceiver

RFM75 V1.0
Cn: SPI command bit
Sn: STATUS register bit
Dn: Data Bit (LSB byte to MSB byte, MSB bit in each byte first)
Note: The SPI timing is for bank 0 and register 9 to 14 at bank 1. For register 0 to 8 at bank 1, the byte
order is inversed that the MSB byte is R/W before LSB byte.
Figure 7 SPI NOP timing diagram
Symbol
Tdc
Tdh
Tcsd
Tcd
Tcl
Tch
Fsck
Tr,Tf
Tcc
Tcch
Tcwh
Tcdz
Parameters
Data to SCK Setup
SCK to Data Hold
CSN to Data Valid
SCK to Data Valid
SCK Low Time
SCK High Time
SCK Frequency
SCK Rise and Fall
CSN to SCK Setup
SCK to CSN Hold
CSN Inactive time
CSN to Output High Z
Min
10
20
40
40
0
2
2
50
Max
38
55
8
100
38
Table 3 SPI timing parameter
Units
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
E‐mail:[e-mail]
website://www.hoperf.com
Page 14 of 27