N78E059A Datasheet, PDF (11/138 Pages) List of Unclassifed Manufacturers – Microcontroller

Table 4–1. Pin Description
Pin number
Alternate Function
Symbol
Type^[1]
DIP PLCC PQFP LQFP
1
2
Description
an external capacitor to VDD.
39 43 37 40 P0.0
38 42 36 39 P0.1
37 41 35 38 P0.2
36 40 34 37 P0.3
35 39 33 35 P0.4
AD0 D, I/O _{PORT0: Port 0 is an 8-bit open-drain port by default.}
Via setting P0UP (P0OR.0), P0 will switch as weakly
AD1 D, I/O _{pulled up internally.}
AD2
D, I/O
P0 has an alternative function as AD[7:0] while ex-
ternal memory accessing. During the external
AD3 D, I/O ^{memory access, P0 will output high will be internal}
strong pulled-up rather than weak pull-up in order to
AD4 D, I/O ^{drive out high byte address for external devices.}
34 38 32 34 P0.5
AD5 D, I/O
33 37 31 33 P0.6
AD6 D, I/O
32 36 30 32 P0.7
1
2 40 43 P1.0
T2
2
3 41 44 P1.1 T2EX
AD7 D, I/O
I/O ^{PORT1: Port 1 is an 8-bit quasi bi-directional I/O}
port. Its multifunction pins are for T2, T2EX,
I/O PWM0~PWM4, SS , MOSI, MISO, and SPCLK.
3
4 42 45 P1.2
I/O
4
5 43 46 P1.3 PWM0
I/O
5
6 44 47 P1.4 PWM1 _SS
I/O
6
7
1
1 P1.5 PWM2 MOSI I/O
7
8
2
2 P1.6 PWM3 MISO I/O
8
9
3
3 P1.7 PWM4 SPCLK I/O
21 24 18 19 P2.0
22 25 19 20 P2.1
23 26 20 21 P2.2
24 27 21 22 P2.3
A8
I/O ^{PORT2: Port 2 is an 8-bit quasi bi-directional I/O}
port. It has an alternative function as A[15:8] while
A9
I/O ^{external memory accessing. During the external}
memory access, P2 will output high will be internal
A10
I/O ^{strong pulled-up rather than weak pull-up in order to}
drive out high byte address for external devices.
A11
I/O
25 28 22 23 P2.4
A12
I/O
26 29 23 25 P2.5
A13
I/O
27 30 24 26 P2.6
A14
I/O
28 31 25 27 P2.7
A15
I/O
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Publication Release Date: March 11, 2010
Revision: V2.0