MDT2051 Datasheet, PDF (8/14 Pages) List of Unclassifed Manufacturers – 8-bit micro-controller uses a fully static CMOS design technology

MDT2051
Condition
/MCLR reset (not during SLEEP)
/MCLR reset during SLEEP
WDT reset (not during SLEEP)
WDT reset during SLEEP
Power on reset
Power range-detector Reset
Status: bit 4
u
1
0
0
1
1
Status: bit 3
u
0
1
0
1
1
Status: bit 1
1
1
1
1
0
1
Status: bit 0
1
1
1
1
X
0
8. Instruction Set :
Instruction Code
010000 00000000
010000 00000001
010000 00000010
010000 00000011
010000 00000100
010000 00000rrr
010001 1rrrrrrr
011000 trrrrrrr
111010 iiiiiiii
010111 trrrrrrr
011001 trrrrrrr
011010 trrrrrrr
011011 trrrrrrr
011100 trrrrrrr
011101 trrrrrrr
011110 trrrrrrr
010010 trrrrrrr
110100 iiiiiiii
010011 trrrrrrr
110101 iiiiiiii
010100 trrrrrrr
110110 iiiiiiii
011111 trrrrrrr
Mnemonic
Operands
NOP
CLRWT
SLEEP
TMODE
RET
CPIO R
STWR R
LDR R, t
LDWI I
SWAPR R, t
Function
No operation
Clear Watchdog timer
Sleep mode
Load W to TMODE register
Return from subroutine
Control I/O port register
Store W to register
Load register
Load immediate to W
Swap halves register
INCR R, t
INCRSZ R, t
ADDWR R, t
SUBWR R, t
Increment register
Increment register, skip if zero
Add W and register
Subtract W from register
DECR R, t
DECRSZ R, t
ANDWR R, t
ANDWI i
IORWR R, t
IORWI i
XORWR R, t
XORWI i
COMR R, t
Decrement register
Decrement register, skip if zero
AND W and register
AND W and immediate
Inclu. OR W and register
Inclu. OR W and immediate
Exclu. OR W and register
Exclu. OR W and immediate
Complement register
Operating
Status
None
0 WT
0 WT, stop OSC
W TMODE
Stack PC
W CPIO r
WR
Rt
IW
[R(0~3) ↔R(4~7)]
t
R+1 t
R+1 t
W+R t
R W t or
(R+/W+1 t)
R 1t
R 1t
R Wt
i WW
R Wt
i WW
R Wt
i WW
/R t
TF, PF
TF, PF
None
None
None
None
Z
None
None
Z
None
C, HC, Z
C, HC, Z
Z
None
Z
Z
Z
Z
Z
Z
Z
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P. 8
2004/1 Ver. 1.8