MDT2051 Datasheet, PDF (7/14 Pages) List of Unclassifed Manufacturers – 8-bit micro-controller uses a fully static CMOS design technology

MDT2051
Power-edge Detect
Security state
PED Disable
PED Enable
Security weak Disable
Security Disable
Security Enable
The default security state of EPROM is weak disable. Once the IC was set to
enable or disable, it’s forbidden to change.
(B) Program Memory
Address
000-3FF
000
004
Description
Program memory
The starting address of power on, external reset or WDT time-out reset.
Interrupt vector
7. Reset Condition for all Registers
Register
Address
Power-On Reset,
Power range detector
Reset
/MCLR or WDT Reset
IAR
00h
RTCC
01h
xxxx xxxx
uuuu uuuu
PC
0Ah,02h
00 0000 0000
00 0000 0000
STATUS
03h
0001 1xxx
000# #uuu
MSR
04h
xxxx xxxx
uuuu uuuu
PORT A
05h
- - -1 xxxx
- - -1 uuuu
PORT B
06h
xxxx xxxx
uuuu uuuu
ADS0
08h
00-0 0000
00-0 0000
ADRES
09h
xxxx xxxx
uuuu uuuu
INTS
0Bh
0000 0001
0000 000u
TMR
81h
1111 1111
1111 1111
CPIOA
85h
- - -1 1111
- - -1 1111
CPIOB
86h
1111 1111
1111 1111
PSTA
87h
- - - - - -qq
- - - - - -uu
ADS1
88h
- - - - - -00
- - - - - -00
Note : u unchanged, x unknown, - unimplemented, read as “0”
# value depends on the condition of the following table
Wake-up from SLEEP
uuuu uuuu
PC+1
000# #uuu
uuuu uuuu
- - -u uuuu
uuuu uuuu
uu-u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
- - -u uuuu
uuuu uuuu
- - - - --uu
- - - - --uu
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P. 7
2004/1 Ver. 1.8