PD5019 Datasheet, PDF (7/14 Pages) List of Unclassifed Manufacturers – Telephone Ring Generator Controller

DETAILED DESCRIPTION
CLOCK
XTAL1, XTAL2: The oscillator generates the internal PD5019 clock
frequency.
A Crystal, Ceramic Resonator, or an external clock source may be
used to generate the clock’s basic frequency.
When a Crystal or a Ceramic Resonator is used, it should be
connected between XTAL1 and XTAL2 terminal. For an external
clock source, connect the source to XTAL1, leaving XTAL2
unconnected.
When using a Ceramic Resonator, use the product’s specification
connection recommendations.
When using a Crystal or Ceramic Resonator, a 1Mohm 1% bias
resistor must be connected in parallel.
C1 and C2 recommended values for the different frequency sources
are specified in the table below.
Oscillator type
Frequency
C1
C2
Crystal
12.28MHz
22pF
22pF
Crystal
19.66MHz
10pF
10pF
Ceramic Resonator
12.28MHz
10pF
56pF
Ceramic Resonator
19.66MHz
10pF
56pF
When using an external clock source, C1 and C2 and the Resistor
should not be installed and XTAL2 should be left open.
For the oscillator frequency, refer to the OUTPUT RINGING & PWM
FREQUENCIES Table.
PD5019
TELEPHONE RING GENERATOR CONTROLLER
VCC
Inhibit
signal
4.7K
C3
Inhibit
VCC
1
100K
C4
FS ₂
100K
100KHz PWM Output POR Configuration
The value of C3 and C4 will be determined according to the Supply
Voltage Rise Time and the Inhibit delay operation.
When using a 100KHz PWM output configuration the value of C4
should be 20 times smaller than C3.
[τ (FS) < τ (Inhibit)].
VCC
Inhibit
signal
C3
4.7K
VCC
1
100K
1MΩ
1%
XTAL1 6
FS
2
100K
XTAL2 7
C2
C1
Oscillator Typical Configuration
TURN ON RESET OF THE PD5019
For proper operation, the PD5019 controller must be reset after
power is applied. Reset is performed by setting the Inhibit and the FS
terminals to a high logic level for longer than 1µ sec.
The Inhibit and the FS terminals are connected to an internal Schmitt
input buffer with an internal 100KOhm pull down resistor.
To enable Power On Reset (POR) and proper inhibit operation, a
series resistor and pull up capacitors must be connected to the
INHIBIT terminal. The value of the resistor and the pull up capacitors
determine the reset duration, and delay of the inhibit operation.
300KHz PWM Output POR Configuration
INHIBIT: The Inhibit input serves to turn the device’s output On/Off
by using digital control levels.
High logic level (“1”) disables the device’s output.
When the 96KHz configuration is utilized (FS=”0”), the Inhibit shut
down response is internally delayed until the end of the current half
sine cycle, to the nearest output zero crossing.
When the 307KHz configuration is utilized (FS=”1”), the Inhibit shut
down response is immediate.
FS: This line selects between 96KHz and 307KHz main PWM
frequency.
FS= ”0” = 96KHz
FS= ”1” = 307KHz
The 96KHz PWM frequency is suitable for medium power sine wave
generators, with synchronous switching at the secondary.
In low cost, low power, ring generator applications, the synchronous
switching circuitry may be eliminated. In order to maintain reasonable
efficiency while not employing synchronous switching, the 307KHz
PWM frequency is employed.
PD5019
US Patent No.
5,828,558