GVT71128D32 Datasheet, PDF (4/13 Pages) List of Unclassifed Manufacturers – 128K X 32 SYNCHRONOUS BURST SRAM

GALVANTECH,
GVT71128D32
128K X 32 SYNCHRONOUS BURST SRAM
PIN DESCRIPTIONS (continued)
QFP PINS
97
86
83
84
SYMBOL
CE2
OE#
ADV #
ADSP#
85
ADSC#
31
M O DE
64
ZZ
52, 53, 56, 57, 58, 59,
62, 63, 68, 69, 72-75,
78, 79, 2, 3, 6-9, 12, 13,
18, 19, 22-25, 28, 29
15, 41, 65, 91
DQ1-DQ32
VCC
17, 40, 67, 90
4, 11, 20, 27, 54, 61, 70,
77
5, 10, 21, 26, 55, 60, 71,
76
1, 14, 16, 30, 38, 39, 42,
43, 50, 51, 66, 80
VSS
VCCQ
VSSQ
NC
TYPE
DESCRIPTIO N
input-
Chip enable: This active HIGH input is used to enable the device.
Synchronous
Input
Output Enable: This active LOW asynchronous input enables the data output drivers.
Input -
Address Advance: This active LOW input is used to control the internal burst counter.
Synchronous A HIGH on this pin generates wait cycle (no address advance).
Input -
Synchronous
Address Status Processor: This active LOW input, along with CE# being LOW,
causes a new external address to be registered and a READ cycle is initiated using
the new address .
Input -
Synchronous
Address Status Controller: This active LOW input causes device to be de-selected or
selected along with new external address to be registered. A READ or WRITE cycle is
initiated depending upon write control inputs.
Input -
Static
Mode: This input selects the burst sequence. A LOW on this pin selects LINEAR
BURST. A NC or HIGH on this pin selects INTERLEAVED BURST.
Input -
Snooze: This active HIGH input puts the device in low power consumption standby
Asynchro-nous mode. For normal operation, this input has to be either LOW or NC (No Connect).
Input/
Output
Data Inputs/Outputs: First Byte is DQ1-DQ8. Second Byte is DQ9-DQ16. Third Byte
is DQ17-DQ24. Fourth Byte is DQ25-DQ32. Input data must meet setup and hold
times around the rising edge of CLK.
Supply
Ground
I/O Supply
Power Supply: +3.3V -5% to +10%. Pin 14 does not have to be connected directly to
VCCas long as it is greater than VIH.
Ground: GND
Output Buffer Supply: +3.3V -5% to +10%. For 2.5V I/O: 2.375V to VCC.
I/O Ground Output Buffer Ground: GND
-
No Connect: These signals are not internally connected.
BURST ADDRESS TABLE (MODE = NC/VCC)
First Address
(external)
Second Address
(internal)
Third Address
(internal)
A...A00
A...A01
A...A10
A...A01
A...A00
A...A11
A...A10
A...A11
A...A00
A...A11
A...A10
A...A01
BURST ADDRESS TABLE (MODE = GND)
Fourth Address
(internal)
A...A11
A...A10
A...A01
A...A00
First Address
(external)
Second Address
(internal)
Third Address
(internal)
A...A00
A...A01
A...A10
A...A01
A...A10
A...A11
A...A10
A...A11
A...A00
A...A11
A...A00
A...A01
PARTIAL TRUTH TABLE FOR READ/WRITE
Fourth Address
(internal)
A...A11
A...A00
A...A01
A...A10
FUNCTION
READ
READ
WRITE one byte
WRITE all bytes
WRITE all bytes
GW#
H
H
H
H
L
BWE#
H
L
L
L
X
BW1#
X
H
L
L
X
BW2#
X
H
H
L
X
BW3#
X
H
H
L
X
BW4#
X
H
H
L
X
November 20, 1999
Rev. 11/9 9
4
Galvantech, Inc. reserves the right to change products or specifications without notice.