SA25F020 Datasheet, PDF (31/37 Pages) List of Unclassifed Manufacturers – 2Mb Serial Flash with 25MHz SPI Bus Interface

Release from Software Protect
(RES)
Once the device has entered SP mode, all
instructions are ignored except the RES
mode.
Any RES instruction executed while an
Erase, Program or Write Status Register
cycle is in progress is not decoded, and
has no effect on the cycle that is in
progress.
The device is first selected by driving CSb
low, followed by an 8-bit instruction byte,
with each bit being latched in on SI during
the rising edge of SCK.
CS
SA25F020 Advanced Information
SAIFUN
31
Driving CSb high after the 8-bit instruction
byte has been received by the device, but
before the whole of the 8-bit Electronic
Signature has been transmitted for the first
time (as shown in Figure 21), will still
ensure that the device is put into Standby
mode. The transition to Standby mode is
delayed by t_RES, and CSb must remain high
for at least t_RES(max), as specified in
Table 4 on page 10. Once in Standby
mode, the device waits to be selected, so
that it can receive, decode and execute
instructions.
SCK
SI
01234567
Instruction
t_RES
Software Protect Mode
Standby Mode
Figure 21. Release from Software Protect (RES) Instruction Sequence