AF512CFI-7ACXP Datasheet, PDF (19/68 Pages) List of Unclassifed Manufacturers – ATP Industrial Grade CompactFlashCard Specification

Revision 3.6
SIGNAL NAME
-INPACK
(PC Card Memory Mode)
-INPACK
(PC Card I/O Mode)
Input Acknowledge
DIR.
O
PIN
43
DMARQ
(True IDE Mode)
ATP Industrial Grade CompactFlash Card Specification
DESCRIPTION
This signal is not used in this mode.
The Input Acknowledge signal is asserted by the CompactFlash
Storage Card when the card is selected and
responding to an I/O read cycle at the address that is on the
address bus. This signal is used by the host to control the enable
of any input data buffers between the CompactFlash Storage
Card and the CPU.
Hosts that support a single socket per interface logic, such as for
Advanced Timing Modes and Ultra DMA operation may ignore
the –INPACK signal from the device and manage their input
buffers based solely on Card Enable signals.
This signal is a DMA Request that is used for DMA data
transfers between host and device. It shall be asserted by the
device when it is ready to transfer data to or from the host. For
Multiword DMA transfers, the direction of data transfer is
controlled by -IORD and -IOWR. This signal is used in a
handshake manner with (-)DMACK,
In PCMCIA I/O Mode, the -DMARQ shall be ignored by the host
while the host is performing an I/O Read cycle to the device.
The host shall not initiate an I/O Read cycle while -DMARQ is
asserted by the device.
In True IDE Mode, DMARQ shall not be driven when the device
is not selected in the Drive-Head register.
While a DMA operation is in progress, -CS0 (-CE1)and -CS1
(-CE2) shall be held negated and the width of the transfers shall
be 16 bits.
If there is no hardware support for True IDE DMA mode in the
host, this output signal is not used and should not be connected
at the host. In this case, the BIOS must report that DMA mode is
not supported by the host so that device drivers will not attempt
DMA mode operation.
A host that does not support DMA mode and implements both
PC Card and True IDE modes of operation need not alter the PC
Card mode connections while in True IDE mode as long as this
does not prevent proper operation in any mode.
is not selected in the Drive-Head register.
While a DMA operation is in progress, -CS0 (-CE1)and -CS1
(-CE2) shall be held negated and the width of the transfers shall
be 16 bits.
SIGNAL NAME DIR. PIN
DESCRIPTION
Your Ultimate Memory Solution!
19
ATP Confidential & Proprietary