ICM108B Datasheet, PDF (18/20 Pages) List of Unclassifed Manufacturers – 1.3 million pixel Color CMOS image sensor

ICM108B 1.3 million pixel CMOS sensor
Data Sheet V 1.1 November, 2002
4.3 Pixel Clock Duty Cycle
In different frame rate mode (controlled by PART_CONTROL [6:4]), the duty cycle (high time / clock
period) of the PCLK signal is described in the following table:
Frame Rate
30
15
10
5
4
3
2
1
Duty Cycle
50.0%
50.0%
50.0%
50.0%
53.3%
50.0%
50.0%
50.0%
4.4 Default Wavetable Timing
The following timing diagram is used when bit 4 of register TIMING_CONTROL_LOW is set at 1. If it is
set at 0, wave table is used instead.
Wavetable Timing
EXPOSURE
RESET
PHOTODIODE
READ
RESET
RESET
READ
CDS
State 0
1
23
45
6
7 8 9 10
11
12
IWORD
1(HIGH)
DALINIT
SEN_ROW_SEL
IRST
DALSEL
SLOPEEN
Clocks Counts ⁴
17
2
11 2 2 1000 (2000 ADC) 4 10 2 2 400 (800 ADC)
44
1500
©2000, 2001, 2002 IC Media Corporation & IC Media Technology Corp.
11/22/2002
page 18
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