ACD80800 Datasheet, PDF (10/19 Pages) List of Unclassifed Manufacturers – Address Resolution Logic (8K MAC Addresses)

WCHDOG remains at low state, the chip is not working
properly and needs to be reset.
nRESET pin is used to do a hardware reset to the
ACD80800. Please note that after a hardware reset, all
learned address is cleared, and the address table has
to be built again.
into the command register. When a new command is
written into the command register, ACD80800 will
change the status of the Result register to 0. The
Result register will indicate the completion of the
command at the end of the execution. Before the
completion of the execution, any command written into
the command register is ignored by ACD80800.
Configuration Interface
The registers accessible to the CPU are described by
table 4:
The following table shows the Power-On-Strobed con-
figuration setting:
Power-On-Strobed Setting
Name
Description
BIST
Enable
IC Test
Enable
DIO
Enable
Port ID
Select
NO CPU
Boot-Internal-Self-Test for
optional internal RAM test
IC Manufacturer test use only:
always pull low
1 = Data I/O
0 = UART Mode
1 = for 82124 or 82012
0 = reserved
11 = No CPU, 80800 will self
initiate
00 = With CPU, 80800 will wait
for CPU to initiate
Shared
Pin#
78
77
76
75
74/111
Bus Width
Selection
00
=
32
bit
(
reserved
)
110/109
01 = 48 bit ( 82124 or 82012)
10 = reserved
11 = 64 bit ( reserved )
UART ID
000 = ID for the only or the first
80800 on the system
001 = ID for the second 80800
on the system with two 80800s
Note: High=1=Enable
114/113/112
6. REGISTER DESCRIPTION
Table-4: Register Description
Reg.
Name
Description
0
DataReg0
Byte 0 of data
1
DataReg1
Byte 1 of data
2
DataReg2
Byte 2 of data
3
DataReg3
Byte 3 of data
4
DataReg4
Byte 4 of data
5
DataReg5
Byte 5 of data
6
DataReg6
Byte 6 of data
7
DataReg7
Byte 7 of data
8
AddrReg0
LSB of address value
9
AddrReg1
MSB of address value
10
CmdReg
Command register
11
RsltReg
Result register
12
CfgReg
Configuration register
13 IntSrcReg
Interrupt source register
14 IntMskReg
Interrupt mask register
15 nLearnReg0
16 nLearnReg1
17 nLearnReg2
Address learning disable
register for port 0 - 7
Address learning disable
register for port 8 - 15
Address learning disable
register for port 16 - 23
18 AgeTimeReg0 LSB of aging period register
19
AgeTimeReg
1
MSB of aging period
register
20 PosCfg0
Power On Strobe
configuration register 0
21 PosCfg1
Power On Strobe
configuration register 1
ACD80800 provides a bunch of registers for the CPU
to access the address table inside it. Command is
sent to ACD80800 by writing into the associated
registers. Before the CPU can pass a command to
ACD80800, it must check the result register (register
11) to see if the command has been done. When the
Result register indicates the command has been done,
the CPU may need to retrieve the result of previous
command first. After that, the CPU has to write the
associated parameter of the command into the Data
registers. Then, the CPU can write the command type
The DataRegX are registers used to pass the param-
eter of the command to the ACD80800, and the result
of the command to the CPU.
The AddrRegX are registers used to specify the
address associated with the command.
The CmdReg is used to pass the type of command to
the ACD80800. The command types are listed in table
5. The details of each command is described in the
chapter of “Command Description.”
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