24C128 Datasheet, PDF (1/8 Pages) Integrated Silicon Solution, Inc – 131,072-bit 2-WIRE SERIAL CMOS EEPROM

Turbo IC, Inc.
24C128/24C256
PRODUCT PRELIMINARY
CMOS I²C 2-WIRE BUS
128K/256K ELECTRICALLY ERASABLE PROGRAMMABLE ROM
16K/32K X 8 BIT EEPROM
FEATURES :
• Extended Power Supply Voltage
Single Vcc for Read and Programming
(Vcc = 2.7 V to 5.5 V)(Vcc = 4.5V to 5.5V)
• Low Power (Isb = 2µa @ 5.5 V)
• Extended I²C Bus, 2-Wire Serial Interface
• Support Byte Write and Page Write (64 Bytes)
• Automatic Page write Operation (maximum 10 ms)
Internal Control Timer
Internal Data Latches for 64 Bytes
• Hardware Data Protection by Write Protect Pin
• High Reliability CMOS Technology
EEPROM Cell
Endurance : 100,000 Cycles
Data Retention : 100 Years
• 8 pin JDEC 300 mil wide PDIP AND 8 pin 150 mil wide
SOIC packages
PIN DESCRIPTION
A0
A1
A2
GND
1
8
2
7
3
6
4
5
VCC
A0 1
WP
A1 2
SCL
A2 3
SDA GND 4
8 VCC
7 WP
6 SCL
5 SDA
8 pin SOIC
8 pin PDIP
PIN DESCRIPTION
DESCRIPTION:
The Turbo IC 24C128/24C256 is a serial 128K/256K
EEPROM fabricated with Turbo’s proprietary, high reliabil-
ity, high performance CMOS technology. It’s 128K/256K of
memory is organized as 16384/32768 x 8 bits.The memory
is configured as 256/512 pages with each page containing
64 bytes. This device offers significant advantages in low
power and low voltage applications.
The Turbo IC 24C128/24C256 uses the extended I²C ad-
dressing protocol and 2-wire serial interface which includes
a bidirectional serial data bus synchronized by a clock. It
offers a flexible byte write and a faster 64-byte page write.
The entire memory can be protected by the write protect
pin.
The Turbo IC 24C128/24C256 is assembled in either a 8-
pin PDIP or 8-pin SOIC package. Pin #1 (A0), #2 (A1), and
#3 (A2) are device address input pins which are hardwired
by the user. Pin #4 is the ground (Vss). Pin #5 is the serial
data (SDA) pin used for bidirectional transfer of data. Pin #6
is the serial clock (SCL) input pin. Pin #7 is the write protect
(WP) input pin, and Pin #8 is the power supply (Vcc) pin.
All data is serially transmitted in bytes (8 bits) on the SDA
bus. To access the Turbo IC 24C128/24C256 (slave) for a
read or write operation, the controller (master) issues a start
condition by pulling SDA from high to low while SCL is high.
The master then issues the device address byte which con-
sists of 1010 (A2) (A1) (A0) (R/W). The 4 most significant
bits (1010) are a device type code signifying an EEPROM
device. The A[2:0] bits represent the input levels on the 3
device address input pins. The read/write bit determines
whether to do a read or write operation. After each byte is
transmitted, the receiver has to provide an acknowledge by
pulling the SDA bus low on the ninth clock cycle. The ac-
knowledge is a handshake signal to the transmitter indicat-
ing a successful data transmission.
DEVICE ADDRESSES (A2-A0)
The address inputs are used to define the 3 least
significant bits of the 7-bit device address code -
1010 (A2) (A1) (A0). These pins can be con-
nected either high or low. A maximum of eight
Turbo IC 24C128/24C256 can be connected in
parallel, each with a unique device address. When
these pins are left unconnected, the device ad-
dresses are interpreted as zero.
WRITE PROTECT (WP)
When the write protect input is connected to Vcc,
the entire memory is protected against write op-
erations. For normal write operation, the write
protect pin should be grounded. When this pin is
left unconnected, WP is interpreted as zero.
SERIAL DATA (SDA)
SDA is a bidirectional pin used to transfer data
in and out of the Turbo IC 24C128/24C256. The
pin is an open-drain output. A pull-up resistor
must be connected from SDA to Vcc.
SERIAL CLOCK (SCL)
The SCL input synchronizes the data on the SDA
bus. It is used in conjunction with SDA to define
the start and stop conditions. It is also used in
conjunction with SDA to transfer data to and from
the Turbo IC 24C128/24C256.
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