AMC8500 Datasheet, PDF (9/27 Pages) List of Unclassifed Manufacturers – TWO PHASE VARIABLE SPEED FAN MOTOR CONTROLLER

Preliminary Specification
aMC8500
Hall Inputs
Rotor position is detected by a single Hall sensor to enable proper motor drive commutation. The H+ and H- Amplifier
inputs are designed to interface with a wide variety of economical 4 pin unbuffered 'naked' or 3 pin buffered 'digital' Hall
sensor types. The unbuffered sensors provide a low level differential output signal that is directly proportional to the rotors
applied magnetic field. The sensor outputs connect directly to the H+ and H- inputs. The Amplifier has a differential input
sensitivity of 20 mV with a common mode voltage range that extends from V_DD to ground. By extending the input range to
include ground, the need for offsetting the Hall output voltage with a series ground resistor is eliminated. Figures 20 through
22 show three methods of biasing unbuffered Hall sensors. The aMC8500 Hall Amplifier features enhanced noise rejection
by combining a small level of input hysteresis with a propriety zero crossing detector and a timed lockout.
The buffered Hall sensors provide a high level digital output signal that changes state in direct response the rotor magnetic
pole transitions. This output signal is single ended and can be applied to either the H+ or H- input while biasing the unused
input to a level that is within the output voltage swing of the sensors. Economical buffered Hall sensors typically contain an
NPN open collector sink only output which requires a pull-up resistor. Figures 23 and 24 show two methods for biasing
buffered Hall sensors.
Commutation
The aMC8500 features a non-overlapping commutation delay circuit that prevents simultaneous drive conduction for
reduced power supply current spikes and radio frequency interference (RFI). The non-overlap delay time (t_dly) is internally set
to 40 µs. The commutation waveforms and truth table are shown below in Figures 15 and 16.
Figure 15- Two Phase, Two Step, Half Wave Commutation Waveforms
Hall
Inputs
0
H+
H-
V_Clamp
Phase 1
Drain
Voltage ^VMotor
0
Rotor Electrical Position (Degrees)
180
360
540
720
0
180
360
540
720
Phase 1
Drain
0
Current
V_Clamp
Phase 2
Drain
Voltage ^VMotor
0
t_dly(Com)
t_dly(Com)
Phase 2
Drain
0
Current
FGRL
Output
Voltage 0
Full Speed (100% PWM)
Reduced Speed (≈ 50% PWM)
X = Don’t care
© Andigilog, Inc. 2006
Figure 16- Commutation Truth Table
Hall Inputs
+
(Pin 3)
-
(Pin 4)
Low
High
System
Fault
None
Drive Outputs
Phase 1
(Pin 16)
Phase 2
(Pin 1)
Off
Low
High
Low
None
Low
Off
X
X
Yes
Off
Off
-9-
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FGRL
Output
(Pin 15)
Low
High
High
August 2006 - 70A04018