U62256 Datasheet, PDF (8/9 Pages) List of Unclassifed Manufacturers – STANDARD 32K X 8 SRAM

U62256
Write Cycle1: W-controlled
Ai
E
W
DQi
Input
DQi
Output
G
t_cW
Address Valid
t_su(E)
t_h(A)
t_su(A)
t_su(A-WH)
t_w(W)
t_su(D)
t_h(D)
t_dis(W)
Input Data Valid
High-Z
t_en(W)
Write Cycle 2: E-controlled
Ai
E
W
DQi
Input
DQi
Output
G
t_su(A)
t_en(E)
t_cW
Address Valid
t_w(E)
t_h(A)
t_su(W)
t_su(D)
t_h(D)
t_dis(W)
Input Data Valid
t_dis(G)
High-Z
undefined
L- to H-level
H- to L-level
The information describes the type of component and shall not be considered as assured characteristics.Terms of
delivery and rights to change design reserved.
8
November 01, 2001