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U62256 Datasheet, PDF (4/9 Pages) List of Unclassifed Manufacturers – STANDARD 32K X 8 SRAM
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U62256
Switching Characteristics
Read Cycle
Read Cycle Time
Address Access Time to Data Valid
Chip Enable Access Time to Data Valid
Output Enable Access Time to Data Valid
E HIGH to Output in High-Z
G HIGH to Output in High-Z
E LOW to Output in Low-Z
G LOW to Output in Low-Z
Output Hold Time from Address Change
Symbol
Alt.
IEC
tRC
tAA
tACE
tOE
tHZCE
tHZOE
tLZCE
tLZOE
tOH
tcR
ta(A)
ta(E)
ta(G)
tdis(E)
tdis(G)
ten(E)
ten(G)
tv(A)
07
Min. Max.
70
70
70
35
25
25
5
0
5
10
Unit
Min. Max.
100
ns
100 ns
100 ns
45
ns
35
ns
35
ns
5
ns
0
ns
5
ns
Switching Characteristics
Write Cycle
Write Cycle Time
Write Pulse Width
Write Pulse Width Setup Time
Address Setup Time
Address Valid to End of Write
Chip Enable Setup Time
Pulse Width Chip Enable to End of Write
Data Setup Time
Data Hold Time
Address Hold from End of Write
W LOW to Output in High-Z
G HIGH to Output in High-Z
W HIGH to Output in Low-Z
G LOW to Output in Low-Z
Symbol
Alt.
IEC
tWC
tWP
tWP
tAS
tAW
tCW
tCW
tDS
tDH
tAH
tHZWE
tHZOE
tLZWE
tLZOE
tcW
tw(W)
tsu(W)
tsu(A)
tsu(A-WH)
tsu(E)
tw(E)
tsu(D)
th(D)
th(A)
tdis(W)
tdis(G)
ten(W)
ten(G)
07
Min. Max.
70
55
55
0
65
65
65
30
0
0
25
25
0
0
10
Unit
Min. Max.
100
ns
70
ns
70
ns
0
ns
80
ns
80
ns
80
ns
35
ns
0
ns
0
ns
35
ns
35
ns
0
ns
0
ns
4
November 01, 2001
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