OCX160 Datasheet, PDF (8/44 Pages) List of Unclassifed Manufacturers – OCX160 Crosspoint Switch

OCX160 Crosspoint Switch—Preliminary Data Sheet
1.1 Input and Output Buffers
All of the input buffers are differential inputs with flow-through mode. The output buffers are
programmable for either flow-through or registered mode. Figure 3 shows the basic block diagram of the
input and output blocks with the sources for the output control signals (OE# and CLK). The control signals
are explained in more details in the following sections.
Input
Switch
Matrix
Output Mode
Select
DQ
Output
CLK
Next
Neighbor
Clock
Select
OE#
Figure 3 Input and Output Buffer Configuration
1.1.1 Input and Output Port Function Mode
The following legend describes the various modes of the Input and Output Ports and the
specification used by the OCXPro™ Software.
Legend:
Ax–Switch Matrix Signal
Px–Port Signal
OE#–Output Enable (# means “Active Low”)
CLK–Clock
Table 1 Summary for Programmable I/O Attributes for OCX160
Symbol
Px
Ax
I/O Port Function
Input – The external signal is buffered from the Input Port pin
to the corresponding Switch Matrix line.
Mnemonic
IN
Output – The internal signal is buffered from the
OP
Ax
Px
corresponding Switch Matrix line to the Output Port pin. In
this mode an optional output enable (OE#) can be selected.
The default state is logic high with enable set to ON.
OE#
Ax
DQ
CLK
Registered Output – The internal signal on the Switch Matrix
RO
Px _{line is registered by an edge-triggered register within the}
Output Port. A clock source is required in this mode. An
output enable (OE#) is available but not required.
OE#
No Connect – In this mode, the output Port pin is isolated
NC
Ax
Px
from the Switch Matrix.
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[Rev. 1.6] 2/20/01
I-Cube, Inc.