JA58560 Datasheet, PDF (7/16 Pages) List of Unclassifed Manufacturers – Mask-ROM 8-Bit CMOS Micro-controller

JA58560
The registers of JA58560
The registers of JA58560
Address
Description
00H
Indirect addressing register
01H
Timer0
02H
PC
03H
Status
04H
FSR
05H
Port A
06H
Port B
07H~1FH General purpose register
y INAR (Indirect Address Register) : 00H
INAR is not a physically implemented register. It is used as an indirect addressing pointer. Any
instruction accessing this register can access data pointed by FSR(04H).
y Timer0 (8-bit real-time clock/timer) : 01H
This register increases by an external signal edge applied to T0CKI pin, or by internal instruction cycle. It
can be read or written as any other register.
y PC (Program Counter) : 02H
This register increases itself along with every instruction cycle, except the following condition specified in
Figure 3.1:
LCALL, LGOTO: from instruction word
RETIA: from STACK
A10~A0
Program Counter
LCALL
RETIA
Stack 1
Stack 2
Stack 3
Stack 4
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