JA58560 Datasheet, PDF (11/16 Pages) List of Unclassifed Manufacturers – Mask-ROM 8-Bit CMOS Micro-controller

Real Time Clock (Timer0) and Watchdog Timer
T0CKI
TE
f_OSC/4
1
M
U
0X
TS _PSC
1
0
MUX
JA58560
WDT Enable
WDT
1
0
PSC
MUX
Sync 2
Cycles
Timer 0
8 Bits
Data Bus
PS2:PS0
8-Bit prescaler
8 Bits
8-to-1 MUX
1
0
PSC
MUX
WDT Time-out
y Timer0
Timer0 is an 8-bit timer/counter. The clock source of Timer0 may come from the internal clock or by an
external clock source presented at the T0CKI pin.
To select the internal clock source, bit 5 of the T0MODE register should be clear. In this mode, Timer0
increases 1 on every instruction cycle (without prescaler).
To select the external clock source, bit 5 of the T0MODE register should be set. In this mode, Timer0
increases 1 on every falling or rising edge of T0CKI pin, which was be controlled by bit 4 of T0MODE
register.
y Watchdog Timer (WDT)
The Watchdog Timer is a free running on-chip RC oscillator. This RC oscillator is separated from the RC
oscillator of the OSCI pin. That means the WDT keeps running even when the oscillator driver is turned
off, such as in sleep mode. During normal operation or in sleep mode, a WDT time-out causes the
device reset and the TO bit (bit 4 of STATUS register) is cleared.
Without prescaler, the WDT time-out period is 18ms. This period can be increase by using the prescaler.
The division ratio of prescaler is up to 1:128. Thus, the longest time-out period is approximately 2.3s.
y Prescaler
The 8-bit prescaler may be assigned to either the Timer0 or the WDT through the PSC bit (bit 3 of the
T0MODE register). Setting this bit assigns the prescaler to the WDT. Resetting this bit assigns the
prescaler to the Timer0. The PS2:PS0 bits determine the prescale ratio. The prescaler can not be
assigned to both the Timer0 and WDT simultaneously.
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