EN29F040 Datasheet, PDF (7/32 Pages) List of Unclassifed Manufacturers – 4 Megabit (512K x 8-bit) Flash Memory

EN29F040
Reset Command
Writing the reset command to the device resets the device to reading array data. Address bits are
don’t care for this command.
The reset command may be written between the sequence cycles in an erase command sequence
before erasing begins. This resets the device to reading array data. Once erasure begins, however,
the device ignores reset commands until the operation is complete. The reset command may be
written between the sequence cycles in a program command sequence before programming begins.
This resets the device to reading array data (also applies to programming in Erase Suspend mode).
Once programming begins, however, the device ignores reset commands until the operation is
complete.
The reset command may be written between the sequence cycles in an autoselect command
sequence. Once in the autoselect mode, the reset command must be written to return to reading
array data (also applies to autoselect during Erase Suspend).
If DQ5 goes high during a program or erase operation, writing the reset command returns the device
to reading array data (also applies during Erase Suspend).
Write Mode
Programming is a four-bus-cycle operation. The program command sequence is initiated by writing
two unlock write cycles, followed by the program set-up command. The program address and data
are written next, which in turn initiate the Embedded Program algorithm. The system is not required
to provide further controls or timings. The device automatically provides internally generated program
pulses and verifies the programmed cell margin. Table 5 (Command Definitions) shows the address
and data requirements for the byte program command sequence.
When the Embedded Program algorithm is complete, the device then returns to reading array data
and addresses are no longer latched. The system can determine the status of the program operation
by using DQ7 or DQ6. See “Write Operation Status” for information on these status bits.
Any commands written to the device during the Embedded Program Algorithm are ignored.
Programming is allowed in any sequence and across sector boundaries. A bit cannot be
programmed from a “0” back to a “1”. Attempting to do so may halt the operation and set DQ5 to
“1”, or cause the Data# Polling algorithm to indicate the operation was successful. However, a
succeeding read will show that the data is still “0”. Only erase operations can convert a “0” to a “1”.
COMMAND DEFINITIONS
The operations of the EN29F040 are selected by one or more commands written into the command
register to perform Read/Reset Memory, Read ID, Read Sector Protection, Program, Sector Erase,
Chip Erase, Erase Suspend and Erase Resume. Commands are made up of data sequences
written at specific addresses via the command register. The sequences for the specified operation
are defined in the Command Table (Table 5). Incorrect addresses, incorrect data values or
improper sequences will reset the device to the read mode.
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Rev. D, Issue Date: 2001/07/05
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