CS18LV02565 Datasheet, PDF (7/14 Pages) List of Unclassifed Manufacturers – HIGH SPEED SUPER LOW POWER SRAM

High Speed Super Low Power SRAM
32K-Word By 8 Bit
CS18LV02565
LOW Vcc DATA RETENTION WAVEFORM ( /CE Controlled )
Vcc
CE
Data Retention Mode
t_CDR
V_DR >= 1.5V
t_R
VIH
CE >= V_CC - 0.2V
VIH
AC TEST CONDITIONS
Input Pulse Levels
Vcc/0V
Input Rise and Fall Times
5ns
Input and Output Timing
Reference Level
0.5Vcc
KEY TO SWITCHING WAVEFORMS
WAVEFORMS
INPUTS
OUTPUTS
MUST BE STEADY MUST BE STEADY
MAY CHANGE
FROM H TO L
WILL BE CHANGE FROM H
TO L
MAY CHANGE
FROM L TO H
WILL BE CHANGE FROM L
TO H
DON’T CARE ANY
CHANGE
PERMITTED
CHANGE STATE
UNKNOWN
DOES NOT APPLY
CENTER LINE IS HIGH
IMPEDANCE OFF STATE
AC TEST LOADS AND WAVEFORMS
FIGURE 1A
FIGURE 1B
7
Rev. 2.0
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