M5123 Datasheet, PDF (67/121 Pages) List of Unclassifed Manufacturers – Mega I/O Controller with Plug & Play

Acer Laboratories Inc.
M512x : Mega I/O Controller with PnP
--Preliminary, Confidential, Proprietary--
Command Byte Bit Definition
Bit 7
RSV
MSB
6
5
IBMPCC IBMPC
4
DISKBC
3
INHOVR
2
FLAG
1
RSV
0
ENOBFI
LSB
Command Byte Bit Definition
Bit Number
7
6
5
4
3
2
1
0
Bit Definition
Reserved. This bit should be 0.
IBM Personal Computer Compatibility Mode. Writing a 1 to this
bit tells the keyboard controller that it needs to convert the scan
codes received from the keyboard to those used by the IBM PC.
IBM Personal Computer Mode. Writing a 1 to this bit signals
the keyboard controller not to check parity, or convert scan
codes.
Disable Keyboard. Writing a 1 to this bit disables Keyboard I/F
by driving the clock-line low.
Inhibit Override. Writing a 1 to this bit disables the Keyboard-
Inhibit function.
System Flag. The M8042 places the value written to this bit in
the system flag bit of its status register.
Reserved. This bit should be 0.
Enable Output-Buffer-Full interrupt. Writing a 1 to this bit
causes the controller to generate an interrupt when it places
data into its output buffer.
07-02-1997 Document Number: 512xDS02.doc
Acer Labs: 7F, 115 Tung Hsing Street, Taipei 110, Taiwan, R.O.C. Tel: [phone] Fax: [phone]
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