GP520A Datasheet, PDF (6/10 Pages) List of Unclassifed Manufacturers – Programmable Analog Signal Processor

AGC CONTROL STAGE
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP MAX UNITS
Quiescent Voltage on Pad 2
V_Q2
I_THRESH = I_R
-
Quiescent Voltage on Pad 3
V_Q3
I_GAIN = I_R x 1.875
-
Quiescent Voltage on Pad 23
V_Q23
-
Quiescent Voltage on Pad 25
V_Q25
-
Quiescent Voltage on Pad 27
V_Q27
-
Release Current Max (Pad 1)
I_{REL MAX}
I_REL = 0 (S1 closed)
-
Release Current Min (Pad 1)
I_{REL MIN}
I_REL = 1.875 x I_R (S1 closed)
-
Input Resistance (Pad 25)
R_IN25
I_REL = I_R
-
Input Resistance (Pad 27)
R_IN27
I₂₇ = ± I_R
-
Max Transconductance (Pad 26 to V_O) G_MAX
I_GAIN=I_R x 2 x 1.875 V_P26=30 mVpp -
I_THRESH =1.875 x I_R (Note 1)
Gain Range (Pad 26 to V_o)
GAIN_RANGE I_THRESH =1.875 x I_R (Note 2)
-
V₂₆ = 25 mVpp
Output Limiting Level (Pad 3)
Limiting Level Range
OUT_LIM
LIM_RANGE
I_THRESH =I_R, I_GAIN = 2 x 1.875 x I_R -
V₂₆ = 100 mVpp (Note 3)
I_GAIN = I_R x 2 x1.875 (Note 4)
-
V₂₆ = 100 mVpp
AGC Compression Ratio
CMP_RAT
I_THRESH =I_R
I_GAIN = 2 x 1.875 x I_R (Note 5)
-
Unless otherwise stated in CONDITIONS column all switches remain OPEN, all current sources are 0µA
400
-
mV
700
-
mV
500
-
mV
500
-
mV
600
-
mV
300
-
nA
30
-
nA
17
-
kΩ
4
-
kΩ
160
- µA/V
33
-
dB
0.7
- µARMS
13
-
dB
5
-
NOTES:
1. G_MAX = V_o / (V₂₆ x 1M)
4. LIM_RANGE = 20 LOG (V_o [I_THRESH=1.875 x I_R]/V_o [I_THRESH =0] )
2. GAIN_RANGE = 20 LOG ( V_o[I_GAIN= 2 x1.875 x I_R]/ V_o [I_GAIN= 0])
5.
CMP_RAT
=
20
LOG
(V_o
10
[ V₂₆=_-5₄.₅6_d2_Bm_VVRMS]/V _o[V₂₆=1_-37₅.8_dm_BVVRMS ])
3. OUT_LIM = V_o / 1M
1.3 V
9
V
REG
13
3µ3
VOLTAGE
REGULATOR
A_{IN 14}
R1=1M
V _IN
68n
10µ
BUFFER
LPFB
IN
BUFFER
OUT
22 24
26
68n
RECT.
IN
27
C
AGC
1
+12V
10n
0.1
10k
2- ₇
3
LT001
+4
6
S1
-12V
DELTA
OUT
B_IN
B _OUT
10n
31
35
7 30
R
+
LP
FILTER
-
R
FULL WAVE
RECTIFIER
AVERAGING THRESHOLD
CIRCUIT
AGC
V_REG - 0.6 V
V_O
V_CC
RF
2k2
11
D_OUT
LIN/LOG
CONVERTER
12
P GND
6
GND
25
I _REL
2
23
I _THRESH I_GAIN
I _REL
I _THRESH
I_GAIN
All resistors in ohms, all capacitors in
farads unless otherwise stated.
510 - 78 - 06
Fig. 7 AGC Control Stage Test Circuit
6