GP520A Datasheet, PDF (4/10 Pages) List of Unclassifed Manufacturers – Programmable Analog Signal Processor

LOW PASS FILTER
PARAMETER
SYMBOL
CONDITIONS
MIN
Quiescent Voltage on Pad 21
V_Q21
-
Quiescent Voltage on Pad 22
V_Q22
-
Quiescent Voltage on Pad 24
V_Q24
-
Quiescent Voltage on Pad 26
V_Q26
-
Maximum DC Current from Pad 22 I_{LP MAX} I_LP = 0µA (S1 closed)
-
Minimum DC Current from Pad 22 I_{LP MIN}
I_LP =1.875 x I_R (S1 closed)
-
Output Swing High (Pad 26)
V_OH
V₂₄ = V_Q24 + 100mV (S2 closed)(Note 1)
-
Output Swing Low (Pad 26)
V_OL
V₂₄ = V_Q24 - 100mV (S2 closed )(Note 1)
-
Max Sinking Current from Pad 26
I_SINK
V₂₄ = 0.4V; V₂₆ = V_Q26 - 100mV
30
(S2, S3 closed)
TYP
550
650
650
650
2.0
0.7
100
-100
-
MAX UNITS
-
mV
-
mV
-
mV
-
mV
-
µA
-
µA
-
mV
-
mV
-
µA
Max Sourcing Current to Pad 26
Buffer Gain
Input Resistance (Pad 21)
NOTE: 1. V_OH = V_OL = V_P26 - V_Q26
I_SOURCE
V₂₄ = 0.8V; V₂₆ = V_Q26 ± 100mV
(S2, S3 closed)
-30
-
-
µA
GAIN
R_IN21
V₂₆ = V_Q26 ± 100mV
I_LP = I_R
-
0
-
dB
-
13
-
kΩ
All switches remain OPEN unless otherwise stated in CONDITIONS column.
V_{REG 13}
3µ3
+1.3 V
V _CC
9
-
+ ^V24
-
+ ^V26
S1
S2
S3
BUFFER BUFFER
LPFB
IN
OUT
22
24
26
68n
68n 10n ^{10n 10K}
RECT.
IN
C_AGC
27 1 30
B
IN
31 ⁵
R
+
LP
-^FILTER
R
B
OUT
7
V_CC
2k2
11
D_OUT
0.6 V
R _IN
12 6
P GND
GND
LIN/LOG
CONVERTER
21
I _LP
I _REF
16
I _REF
I _LP
All resistors in ohms, all capacitors in
farads, unless otherwise stated.
Fig. 3 Low Pass Filter DC Test Circuit
510 - 78 - 06
4