STK22C48 Datasheet, PDF (5/11 Pages) List of Unclassifed Manufacturers – 2K x 8 AutoStore™ nvSRAM QuantumTrap™ CMOS Nonvolatile Static RAM

STK22C48
HARDWARE MODE SELECTION
E
W
HSB
A₁₂ - A₀ (hex)
H
X
H
X
MODE
Not Selected
I/O
Output High Z
POWER
Standby
NOTES
L
H
H
X
Read SRAM
Output Data
Active
n
L
L
H
X
Write SRAM
Input Data
Active
X
X
L
X
Nonvolatile STORE
Output High Z
l_CC2
m
Note m: HSB STORE operation occurs only if an SRAM write has been done since the last nonvolatile cycle. After the STORE (if any) completes, the
part will go into standby mode, inhibiting all operations until HSB rises.
Note n: I/O state assumes G < V_IL. Activation of nonvolatile cycles does not depend on state of G.
HARDWARE STORE CYCLE
(V_CC = 5.0V ± 10%)^e
SYMBOLS
NO.
Standard
Alternate
PARAMETER
STK22C48
MIN MAX
UNITS NOTES
22
t_STORE
t_HLHZ
23
t_DELAY
t_HLQZ
24
t_RECOVER
t_HHQX
25
t_HLHX
26
t_HLBL
STORE Cycle Duration
Time Allowed to Complete SRAM Cycle
Hardware STORE High to Inhibit Off
Hardware STORE Pulse Width
Hardware STORE Low to Store Busy
10
ms
i, o
1
µs
i, p
700
ns
o, q
15
ns
300
ns
Note o: E and G low for output behavior.
Note p: E and G low and W high for output behavior.
Note q: t_RECOVER is only applicable after t_STORE is complete.
HARDWARE STORE CYCLE
25
t_HLHX
HSB (IN)
22
t_STORE
24
t_RECOVER
HSB (OUT)
DQ (DATA OUT)
HIGH IMPEDANCE
26
t_HLBL
23
t_DELAY
DATA VALID
HIGH IMPEDANCE
DATA VALID
December 2002
5 Document Control # ML0004 rev 0.0