STK22C48 Datasheet, PDF (2/11 Pages) List of Unclassifed Manufacturers – 2K x 8 AutoStore™ nvSRAM QuantumTrap™ CMOS Nonvolatile Static RAM

STK22C48
ABSOLUTE MAXIMUM RATINGS^a
Voltage on Input Relative to Ground . . . . . . . . . . . . . –0.5V to 7.0V
Voltage on Input Relative to V_SS . . . . . . . . . .–0.6V to (V_CC + 0.5V)
Voltage on DQ_0-7 or HSB . . . . . . . . . . . . . . . .–0.5V to (V_CC + 0.5V)
Temperature under Bias. . . . . . . . . . . . . . . . . . . . . .–55°C to 125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .–65°C to 150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W
DC Output Current (1 output at a time, 1s duration) . . . . . . . 15mA
DC CHARACTERISTICS
Note a:
Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at con-
ditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rat-
ing conditions for extended periods may affect reliability.
(V_CC = 5.0V ± 10%)^e
SYMBOL
I_CC1b
PARAMETER
Average V_CC Current
I_CC2c
I_CC3b
I_CC4c
I_SB1d
I_SB2d
I_ILK
I_OLK
V_IH
V_IL
V_OH
V_OL
V_BL
T_A
Average V_CC Current during STORE
Average V_CC Current at t_AVAV = 200ns
5V, 25°C, Typical
Average V_CAP Current during
AutoStore™ Cycle
Average V_CC Current
(Standby, Cycling TTL Input Levels)
V_CC Standby Current
(Standby, Stable CMOS Input Levels)
Input Leakage Current
Off-State Output Leakage Current
Input Logic “1” Voltage
Input Logic “0” Voltage
Output Logic “1” Voltage
Output Logic “0” Voltage
Logic “0” Voltage on HSB Output
Operating Temperature
COMMERCIAL
MIN
MAX
85
75
65
3
10
INDUSTRIAL
MIN
MAX
90
75
65
3
10
UNITS
mA
mA
mA
mA
mA
2
2
mA
25
26
mA
21
22
mA
18
19
mA
1.5
1.5
mA
±1
±1
µA
±5
±5
µA
2.2
V_CC + .5
2.2
V_CC + .5
V
V_SS – .5
0.8
V_SS – .5
0.8
V
2.4
2.4
V
0.4
0.4
V
0.4
0.4
V
0
70
–40
85
°C
NOTES
t_AVAV = 25ns
t_AVAV = 35ns
t_AVAV = 45ns
All Inputs Don’t Care, V_CC = max
W ≥ (V _CC– 0.2V)
All Others Cycling, CMOS Levels
All Inputs Don’t Care
t_AVAV = 25ns, E ≥ V_IH
t_AVAV = 35ns, E ≥ V_IH
t_AVAV = 45ns, E ≥ V_IH
E ≥ (V _CC – 0.2V)
All Others V_IN ≤ 0.2V or ≥ (V_CC – 0.2V)
V_CC = max
V_IN = V_SS to V_CC
V_CC = max
V_IN = V_SS to V_CC, E or G ≥ V_IH
All Inputs
All Inputs
I_OUT = – 4mA except HSB
I_OUT = 8mA except HSB
I_OUT = 3mA
Note b:
Note c:
Note d:
Note e:
I_CC1 and I_CC3 are dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.
EI^CC≥²Va_Iⁿ_H^dwIiCll^Cn⁴oatrperothdeucaevesrtaagnedbcyurcruernrtesnrtelqeuveirlesdufnotriltahneydnuorantvioonlaotiflethceycrelespinepctriovgere^Ss^Ts^Oh^Ra^Esctyimcleeds
(t_STORE
out.
)
.
V_CC reference levels throughout this datasheet refer to V_CCX if that is where the power supply connection is made, or V_CAP if V_CCX is con-
nected to ground.
AC TEST CONDITIONS
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 3V
Input Rise and Fall Times. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤ 5ns
Input and Output Timing Reference Levels . . . . . . . . . . . . . . . 1.5V
Output Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Figure 1
CAPACITANCE^f (T_A = 25°C, f = 1.0MHz)
SYMBOL
PARAMETER
MAX UNITS CONDITIONS
C_IN
C_OUT
Input Capacitance
8
Output Capacitance
7
pF
∆V = 0 to 3V
pF
∆V = 0 to 3V
Note f: These parameters are guaranteed but not tested.
OUTPUT
255 Ohms
5.0V
480 Ohms
30 pF
INCLUDING
SCOPE AND
FIXTURE
Figure 1: AC Output Loading
December 2002
2 Document Control # ML0004 rev 0.0