NT6880 Datasheet, PDF (4/13 Pages) List of Unclassifed Manufacturers – Keyboard Controller

NT6880
2. System Reserved Registers
Addr. Register Bit7
$00C0
BT
BT7
$00C1 TCON
-
$00C2
$00C3
$00C4
$00C5
$00C6
$00C7
$00C8
$00C9
$00CA
$00CB
$00CC
$00CD
$00CE
$00CF
CLRIRQX
PORT0
PORT1
PORT2
PORT3
CLK
DATA
LED
CLRWDT
X
X
X
X
X
-
PD07
PD17
PD27
-
-
-
-
0
X
X
X
X
X
- : no effect
Bit6
Bit5
Bit4
BT6
BT5
BT4
-
-
-
-
PD06
PD16
PD26
-
-
-
-
1
X
X
X
X
X
-
PD05
PD15
PD25
-
-
-
-
0
X
X
X
X
X
-
PD04
PD14
PD24
PD34
-
-
-
1
X
X
X
X
X
X : access not allowed
Bit3
BT3
-
-
PD03
PD13
PD23
PD33
-
-
-
0
X
X
X
X
X
Bit2
BT2
-
-
PD02
PD12
PD22
PD32
-
-
LED2
1
X
X
X
X
X
Bit1
Bit0
R/W
BT1
BT0
W
-
ENBT
W
-
CLRIRQTMR W
PD01
PD00
RW
PD11
PD10
RW
PD21
PD20
RW
PD31
PD30
RW
-
CLK
RW
-
DATA
RW
LED1
LED0
W
0
1
W
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
3. ROM: 5K X 8 bits
The built-in ROM program code, executed by the 6502
CPU, has a capacity of 5K X 8 bits and is addressed from
EC00H to FFFFH.
4. SRAM: 160 X 8 bits
The built-in SRAM is used for general purpose data
memory and for the stack area. SRAM is addressed from
0000H to 009FH. User can allocate stack area in the
SRAM by setting stack pointer register (S). Because the
6502 default stack pointer is 01FFH, it must be mapped to
009FH. Mapping from 01XX to 00XX is done internally by
setting the S register to 9FH via software programming.
For example :
LDX #$9F
TXS
For compatibility to UM6868A with 128-byte SRAM, the
user’s source code can not be changed.
For example :
LDX #$7F
TXS
5. Power-On Reset
Built-in power-on reset circuit can generate a 150ms pulse
to reset the entire chip. The beginning of the 150ms pulse
occurs at 60% of VDD when powered on.
power
V DD
60%
The start of 150ms pulse
t
Figure 5.1. Power-On Reset Timing
4