M13S128324A Datasheet, PDF(4/48 Page) Elite Semiconductor Memory Technology Inc. – 1M x 32 Bit x 4 Banks Double Data Rate SDRAM

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M13S128324A Datasheet, PDF (4/48 Pages) Elite Semiconductor Memory Technology Inc. – 1M x 32 Bit x 4 Banks Double Data Rate SDRAM

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ESMT

M13S128324A

Pin Description

(M13S128324A)

Pin Name

A0~A11,

BA0,BA1

Function

Address inputs

- Row address A0~A11

- Column address A0~A7

A8/AP : AUTO Precharge

BA0, BA1 : Bank selects (4 Banks)

DQ0~DQ31 Data-in/Data-out

RAS

CAS

VSS

VDD

DQS0~DQS3

Row address strobe

Column address strobe

Write enable

Ground

Power

Bi- directional Data Strolle.

DQS0 correspond to the data on DQ0~DQ7.

DQS1 correspond to the data on DQ8~DQ15.

DQS2 correspond to the data on DQ16~DQ23.

DQS3 correspond to the data on DQ24~DQ31.

Pin Name

Function

DM0~DM3 DQ Mask enable in write cycle.

CLK, CLK

CKE

VDDQ

VSSQ

VREF

Clock input

Clock enable

Chip select

Supply Voltage for GDQ

Ground for DQ

Reference Voltage for SSTL

No connection

Elite Semiconductor Memory Technology Inc.

Publication Date : Mar. 2006

Revision : 1.0

4/48

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