W65C02S Datasheet, PDF (39/40 Pages) List of Unclassifed Manufacturers – Microprocessor

The Western Design Center, Inc.
9 HARD CORE MODEL
W65C02S Datasheet
9.1 Features of the W65C02S Hard Core Model
• The W65C02S core uses the same instruction set as the W65C02S.
• The only functional difference between the W65C02S and W65C02S core is the RDY pin. The W65C02S RDY pin is
bi-directional utilizing an active pull-up. The W65C02S core RDY function is split into 2 pins, RDY, WAITN and
WAITP. The WAITN output goes low and WAITP goes high when a WAI instruction is executed.
• The ESD and latch-up buffers have been removed.
• The output from the core is the buffer N-channel and the P-channel transistor drivers.
• The following inputs, if not used, must be pulled to the high state: RDY, IRQB, NMIB, BE and SOB.
• The timing of the W65C02S core is the same as the W65C02S.
10 SOFT CORE RTL MODEL
10.1 W65C02 Synthesizable RTL-Code in Verilog HDL
The RTL-Code (Register Transfer Level) in Verilog is a synthesizable model. The behavior of this model is equivalent to
the original W65C02S hardcore. The W65C02 RTL-Code is available as the core model and the W65C02S standard chip
model. The standard chip model includes the soft-core and the buffer ring in RTL-Code.
The Western Design Center, Inc.
W65C02S Datasheet
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